资源列表
PS2_RS232
- 实现PS/2接口与RS-232接口的数据传输， PS/2键盘上按下按键，可以通过RS-232自动传送到主机的串口调试终端上（sscom32.exe）； 并在数据接收区显示接收到的字符。 串口调试终端的设置：波特率115200，一个停止位，无校验位
wulian_dingwenxin_3012204216
- 基于quartus2的环境，做的认真，实现了微波炉的开关温度设置等-Quartus2 based environment, do seriously, to achieve a switching temperature microwave ovens, etc.
trafficlights
- Verilog实现的交通灯功能工程 在Quartus环境-traffic lights of Verilog
16位 CPU实现
- 实现 16位 cpU 包含ALU 控制模块 脉冲模块
myowncpu
- 简单的8字CPU的VHDL实现 dat 内存测试数据-Simple CPU VHDL implementation
Chapter-4
- FPGA Prototyping by VHDL Examples Chapter 4
gh_vhdl_lib_v3_48.rar
- The GH VHDL Standard Parts Library is a collection of basic VHDL parts that may be included in larger designs. There is nothing wrong with modifying library parts so that they will meet the system requirements.,The GH VHDL Standard Parts Library is
vrilog-beep-usart-keyboard
- verilog beep usart keyboard开发板控制外设，数据很稳定，功能很强大-verilog beep usart keyboard development board control peripherals, data is very stable, very powerful
coreFFT_AR_3_0
- FFT算法VHDL生成器（Actel公司提供)
VGA-color-signal-generator
- 1． 了解普通显示器正确显示的时序。 2． 了解VHDL产生VGA显示时序的方法。 3． 进一步加强对FPGA的认识。 -1. Learn ordinary display correctly display timing. 2. Learn VHDL VGA display timing generation method. 3. Further enhance the understanding of the FPGA.
Xilinx_FPGA_FFT_Application_Note
- Xilinx FPGA中FFT IP核的使用笔记，内部有FFT硬核的端口说明和具体设置以及源代码，对于数字信号处理研究人员，能图像处理、雷达成像、实时通信开发人员较多的开发时间！-Xilinx FPGA in the FFT IP core using a laptop internal hard core of the FFT port descr iption and specific settings as well as the source code for digital signa
count10
- 基于Quartus II的十进制加法计数器的项目设计，包含了项目文件和VHDL源代码-Quartus II based on the decimal adder counter the project design, including project documents and VHDL source code