资源列表
scramble
- 在quartusII上已经验证过，很有用的并行加扰程序，用的语言为verilog，需要的可以拿去-Has already been verified in quartusII useful parallel scrambling procedure, the language used for Verilog, need to take look at
FPGA_sram_fifo
- 普通数据传输源码，采用SRAM虚拟FIFO做数据缓存。该虚拟FIFO只做外部数据上传到电脑的数据缓存。-Ordinary data transmission source, using SRAM virtual FIFO data cache. The virtual FIFO only the external data uploaded to the computer data cache.
branches
- vlsi counter code uploaded in vhdl language
tags
- vhdl code for cyclic
EP3C
- 利用Verilog编写的串口收发程序，波特率可调，经测试完全可以应用。-Use of serial transceiver in Verilog program, the baud rate is adjustable, can be applied by the test completely.
Springer_2006_SystemVerilog_for_Verificatio_Chris
- A Guide to Learning the Testbench System Verilog Language Features
NiosII_Exercises_Ver3
- NiosII_Exercises_Ver3,this niosII 3.o for cyclone
ads7822
- ads7822的verilog驱动 fpga芯片为altera公司的ep2c35， 程序调试过好使-ads7822 of verilog-driven
ug192(1)
- detailed spec for Xilinx V5 FPGA, reference for programming of FPGA, system designer or ASIC designer.
electric-current-
- 周立功Fusion StartKit，fpga开发板的实验例程，电流监控实验-ZLG Fusion StartKit, fpga development board test routines, current monitoring experiments
WAVE
- 关于波形发生功能的Verilog代码和Quartus文件完整文档。-Waveform occurred on the function of Verilog code and Quartus files a complete document.
Embedded_System_Lab
- Tutorial on Embedded Systems with NIOS II, SOPCBuilder and Quartus II.