资源列表
ADD
- 含异步清零和同步时钟使能的4位加法计数器的设计-Synchronization with asynchronous clear and clock enable the addition of four counter design
S1_38yima
- EP1C6，38译码器的简单代码，已编译通过-EP1C6 38 decoder simple code, compiled by
ModelSim
- ModelSim下用SystemC做设计验证方法与示例
PEX8311_test
- PEX 8311 OK PCI e cycloneIII altera quartus FPGA CPLD
ALINX9226_DB4CE15
- ad9226双通道，两片ad9226，12位数据口-Ad9226 dual channel, two ad9226, 12 bit data export
ModelSim_chinese
- ModelSim全套中文手册 东西还挺全的 个人觉得对初学者而言还是挺有必要看看的-Getting Started tutorial Amy FPGA series of experiments a number of entry-e-studio programs verilog
EDAFIR
- 采用vhdl代码编写的滤波器仿真，对初学者有一定的帮助。-Vhdl coding using filter simulation, there is some help for beginners.
SPWM1
- 通过三角载波与正弦波的比较，实现SPWM调制算法，可应用与电机控制等领域-By comparing the triangular carrier wave and sine wave to achieve SPWM modulation algorithm can be applied to the motor control and other fields
wave_finish
- 基于quartus2的信号发生器，可产生正弦，三角，方波-Based quartus2 signal generator can produce sine, triangle, square wave. .
total
- 综合应用程序，包括VGA显示，温度测量等，便于初学者掌握使用verilog HDL语言的进行综合设计和使用(Comprehensive application program, including VGA display, temperature measurement and so on, is easy for beginners to master and use Verilog HDL language for comprehensive design and use.)
counter
- 四位计数器设计，完整的设计工程文件在counter文件夹下-Binary code conversion design, complete design engineering files in data_convert file folder...
LCD12864
- utilizing verilog achieve the implement of lcd12864 (no word stock)display of Chinese characters-utilizing verilog achieve the implement of lcd12864 (no word stock)display of Chinese characters