资源列表
another
- 这是一个用数码管显示的verilog语言描述的数字秒表，且引脚已经分配完毕，基于DE2，可直接下载到板子上使用-This is a digital stopwatch with digital display verilog language described, and the pins have been fully allocated, based DE2, can be directly downloaded to the board
zedboard
- 关于xilinx最新出来的开发板zedboard的一些资料-Information about the xilinx Latest the development board zedboard out some
sourcefiles-for-chip-scope-(serial-type-IDEA)
- this code is for IDEA(international data encryption algorithm)
decoder-8b10b
- 可实现8b10b解码的verilog程序，经过测试-8b10b decoder，verilog
encoder-8b10b
- 可以实现8b10b编码，verilog源程序，经过测试-8b10b Encoder
memories-dual-port
- descr iption for memory dual port
lfsr-counter
- descr iption for LFSR counter
FIFO-and-CAM
- verilog code for gray counter,synchronous and asynchronous fifo
mux-top-module
- Vhdl implementation of Mux module using and gate or gate and with testbench
verilog测试代码
- ug193.zip
fwwallace
- wallace tree multiplier in verrilog
Decade-Counter
- decade counter with two input and count out outputs