资源列表
DS18B20
- 基于FPGA温度传感器DS18B20的Verilog设计-Verilog design based on FPGA temperature sensor DS18B20
dsptest
- 基于dsp和matlab的一个简单电路仿真-A simple circuit dsp and matlab based simulation
nios2crc
- 基于niosii和sopcbuilder的冗余校验-Based on niosii and sopcbuilder redundancy check
EDAexp4
- FPGA环境下，用VHDL语言实现序列脉冲器和检测器。-FPGA environment, the use of the VHDL sequence of pulses and detector.
COUNTER10
- 基于sopcbuilder和niosii的计数器-Based on the counter sopcbuilder and niosii
dian-zi-shi-zhong
- 这是一个电子时钟的vhdl程序，功能是可以实现简单的分秒计时，其中包含有分频器、分秒控制器和主程序。-This is an electronic clock vhdl program can achieve the simple timing of every minute, which contains a divider, minutes and seconds, the controller and the main program.
variabled-counter
- 这是一个变模计数器的vhdl程序，可以实现模值为9、11、13、15的计数功能。-This is a variable modulus counter vhdl program value 9,11,13,15 counting function can be achieved mold.
water-lamp
- 这是关于流水灯的vhdl程序，功能是8个led灯间隔1s交替变亮-This is a light water vhdl program, 8 led light interval 1s alternately brighten
verilog-xuexi
- verilog HDL相关的学习资料，对于FPGA与Verilog HDL的初学者有很大帮助。-verilog HDL learning materials for FPGA Verilog HDL beginners.
ex5
- 液晶屏 VGA显示的verilog 源代码-LCD display verilog source code
router
- Hi this is ROUTER code by using system verilog please go through it
HELLO
- 实现HELLO的移动，频率为1秒，仿真通过能使用在de2开发板上-Achieve HELLO mobile frequency of 1 second simulation through de2 development board