资源列表
cputop
- cpu简单开发，利用verilog实现。 并进行下板实验(CPU is simply developed and implemented with Verilog. And carry out the experiment of the lower plate)
disparity
- Disparity mapp code in VHDL
cam_driver
- Verilog Camera Interface
VGApika1
- 实现VGA驱动，能实现皮卡丘图像的显示 新手入门(VGA driver, Pikachu display)
deng
- 模60计数器，适应verilog 语言实现，一个小程序，联系制作(A module 60 counter, implemented in the Verilog language)
01_run_led
- verilog软件实现PLL，对系统时钟进行分频(Verilog software implements PLL, frequency division of system clock)
AD_FPGA_DSP
- 使用FPGA（alteral 类型的飓风四代）控制ADS8364进行数据的采集。但是运行后，运行结果显示会有数据乱窜现象，希望不是程序的问题。(provide a program (writing with Verilog HDL language) to control ADS8364 with FPGA.)
Pan_Tompkins_ECG_v7
- fdgtr thy tyth tytutr5ry56 ty56666666666666y5yht
stepper motor driver
- stepper motor drive. use VHDL
ahb_system_generator_latest.tar
- amba ahb master generator by using verilog
led_2_0816
- veilog程序实现在fpga上流水灯循环显示(Veilog program to achieve in fpga water lamp cycle display)
display_1
- veilog程序可以在fpga上完成数字钟程序(Verilog program can be completed on the digital clock fpga procedures)