资源列表
verilogqdpsk
- verilog通信系统设计 verilog通信系统设计-verilog
LDPC
- VLSI LDPC Soft bit flipping decoder
i2c_verilog_fanli
- i2c程序verilog范例,注释非常详细-i2c program sample verilog
dds--FPGA
- 基于fpga的dds实现,对应东南大学的ESD试验箱-fpga dds
Verilog_HDL
- 一些程序,希望好大家好好看看,很简单,促学者-chengc
versatile_fifo_latest.tar
- 用16*8 RAM实现一个同步先进先出(FIFO)队列设计。由写使能端控制该数据流的写入FIFO,并由读使能控制FIFO中数据的读出。写入和读出的操作由时钟的上升沿触发。当FIFO的数据满和空的时候分别设置相应的高电平加以指示。-versatile_fifo
5
- VHDL语言的基础教程 对学习VHDL语言很有帮助的资料的 -VHDL, VHDL based tutorial to learn the language of information helpful
des
- VHDL实现的DES密码算法的完整的加解密。-DES
fj2j_example
- 实现小波变换mallat算法2层分解,经测试完全正确。-Mallat implementation of wavelet transform decomposition algorithm for layer 2, the test is correct.
waveletfj_example
- 完成一维小波变换一级分解。此文件包含小波变换的mallat算法,经测试完全正确。-Completed a one-dimensional wavelet transform decomposition. This file contains the mallat wavelet transform algorithm, the test is correct.
00
- 用VHDL语言调用IP核,在ISE中实现三角波-VHDL IP core with the realization of the triangular wave is called
xiaomei3
- 介绍了无记忆高功率放大器的非线性特性和常见的各种线性化技术,重点研究了基带查找表法预失真技术,对其进行了FPGA实现-Introduces memoryless nonlinear characteristics of high power amplifier and the common variety of linearization techniques, focus on the base-band pre-distortion lookup table method, techniqu
