资源列表
asagi_yukari_sayici_entity
- vhdl up down counter, entity,vhdl, good source code
Logicunit
- 可控制的逻辑运算单元，包括加法减法逻辑与逻辑异或-Logical unit can be controlled, including the addition or subtraction logic and logic different
DS18B20
- 本程序是基于VHDL语言，在EPM570上开发的温度传感器DS18B20驱动及数码管显示程序-This procedure is based on the VHDL language, developed in the EPM570 DS18B20 drive temperature sensor and digital control display program
clock
- vhdl做的简单的时钟，显示时分秒，可调时分，亮度。eda课程设计时所作。-vhdl do a simple clock display minutes and seconds, adjustable hours, brightness. eda made in curriculum design.
counter
- 一个倒数计时的模块，以秒为单位，可以根据需要修改晶振频率-A countdown of the module, in seconds, you can modify the crystal frequency needed
CIC
- 五阶CIC滤波器，用于降低数据传输速率。数字下变频技术不仅是软件无线电核心技术之一，还是中频数字化接收系统重要组成部分。数字下变频技术中广泛用到级联积分梳状滤波器（CIC滤波器）-CIC filter
MaxPlus2_novice_learning_manuals
- MaxPlus2新手学习手册:学习软件的必备教程，很详细！-MaxPlus2 novice learning handbook: the essential learning software tutorial, very detailed!
subtracter_4
- 好还是verilog，现在你记忆可以，是关于FPGA的设计-Good or verilog, now you can remember, is the design on the FPGA
chfqi
- 简易5位乘法器的设计 用于EDA课程设计和VHDL的入门学习-Easy 5 Multiplier for EDA VHDL introduction to course design and learning
EDAplvj
- 4挡频率及设计 用于测量制定信号的频率 Verilog语言编写-4 block design used to measure the frequency and the frequency of the signal developed Verilog language
vga_demo2
- VGA controller : Genarate a VGA signal from your inout information as color info of each pixel-VGA controller : Genarate a VGA signal from your inout information as color info of each pixel
Embedded_Design_Programming
- This book combines Simulink for high level programming and SystemC for the low level software development. This approach is illustrated with multiple examples of application software and MPSoC architectures that can be used for deep understanding of