资源列表
FPGA-based-USB-system-design
- 基于FPGA的USB通讯系统设计，方便FAGA设计人员进行参考-USB FPGA-based communication system designed to facilitate the design staff reference FAGA
prat5
- This code allows an application with the state machine in VHDL and his conception
VRML_classroom
- 一个VHDL的多媒体教室。功能为： 1、当接近玻璃门，玻璃门会自动打开，可进入教室。 2、屏幕旁边的的四个按钮负责灯的开关、窗帘的开关、投影仪的升降以及电影的播放。 3、单击笔记本可以负责笔记本的打开和关闭。-A VHDL multimedia classroom. Function: 1, when close to the glass doors, glass doors will automatically open, you can enter the classroom.
Virtex5--user--guide
- VIERTEX5 中文用户指南，介绍 Virtex-5 系列的功能-VIERTEX5 chinese user guide
dma_ahb_latest.tar
- this shows the ip code for dma controller of amba ahb in vhdl.
ex8_9_PLL
- FPGA入门，PLL不再是难题；本文件包提供PLL的的程序，供大家参考，请做出批评-FPGA Starter, PLL is no longer a problem this package provides procedures for the PLL, for your reference, please make a critical
RAM_256x8
- RAM 256x8bits code in VHDL
gen_nx64k
- N×64K数控分频模块，可将2.048M时钟分频为一个NX64k的时钟，在E1复用设备上应用。 -N × 64K NC frequency module can be 2.048M NX64k clock frequency for a clock, the E1 multiplexing equipment apply.
SDRAM-control
- SDRAM控制器的Verilog源代码，主要用于SDR-SDRAM-SDRAM controller
fsmled
- verilog语言, 状态机实现数码管显示 -This uses verilog language to make state machine realization of digital control
keybord
- 用Verilog语言实现4*4键盘扫描程序-using Verilog keyboard4*4
uart
- 状态机实现的可配置uart模块，经过fpga验证-State machine implementation can be configured to uart module, after verification fpga