资源列表
lagrange
- 对原信号进行拉格朗日插值运算，实现信号重采样-The original signal Lagrange interpolation operation, to achieve signal resampling
DUO
- VHDL程序，关于电子琴的自动播放，非常有用-VHDL program automatically play on the keyboard is very useful
BISHE
- VHDL程序，关于暖气片的自动控制，非常有用-VHDL program, with regard to the automatic control of radiators, very useful
7
- VHDL实验程序，关于数码管的动态显示，非常有用-VHDL experimental procedures on digital tube dynamic display, very useful
8
- VHDL实验的程序，数字时钟，进行分秒计时，用数码管显示-VHDL experimental procedures, digital clock, for every minute timer with digital display
VHDL
- 用Verilog语言编写的基于Alter公司FPGA学习版的小程序-Verilog language Alter' s FPGA-based applet Learning Edition
basic-vanding-code
- basic vandig code vhdl
VHDL-vanding
- dotmatrix and beep sound use the code
vendingmachinesource
- vendigmachine vhdl 5files component
clock
- digital clock, altera
8253
- altera设计的芯片8253的仿真代码，全工程-8253 altera chip design of the simulation code, the whole works
18B20
- verilog 写的18b20温度采集程序，并通过串品模块送出-verilog 18b20 uart ise