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文件名称:final-design

  • 所属分类：
    VHDL-FPGA-Verilog
  • 标签属性：
    [VHDL] [源码]
  • 上传时间：
    2012-11-16
  • 文件大小：
    1.32mb
  • 已下载：
    0次
  • 提 供 者：
    陈****
  • 相关连接：
    无
  • 下载说明：
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修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

利用verilog来实现一个右移的桶式移位寄存器-make a left shifting register in verilog HDL
(系统自动生成,下载前可以参看下载内容)

下载文件列表

final design/74x151.v.bak
final design/AritL.v
final design/AritL.v.bak
final design/AritL_tst.v
final design/db/finaldesign.(0).cnf.cdb
final design/db/finaldesign.(0).cnf.hdb
final design/db/finaldesign.(1).cnf.cdb
final design/db/finaldesign.(1).cnf.hdb
final design/db/finaldesign.(2).cnf.cdb
final design/db/finaldesign.(2).cnf.hdb
final design/db/finaldesign.(3).cnf.cdb
final design/db/finaldesign.(3).cnf.hdb
final design/db/finaldesign.(4).cnf.cdb
final design/db/finaldesign.(4).cnf.hdb
final design/db/finaldesign.analyze_file.qmsg
final design/db/finaldesign.asm.qmsg
final design/db/finaldesign.atom.rvd
final design/db/finaldesign.cbx.xml
final design/db/finaldesign.cmp.bpm
final design/db/finaldesign.cmp.cdb
final design/db/finaldesign.cmp.ecobp
final design/db/finaldesign.cmp.hdb
final design/db/finaldesign.cmp.kpt
final design/db/finaldesign.cmp.logdb
final design/db/finaldesign.cmp.rdb
final design/db/finaldesign.cmp.tdb
final design/db/finaldesign.cmp0.ddb
final design/db/finaldesign.cmp_merge.kpt
final design/db/finaldesign.db_info
final design/db/finaldesign.eco.cdb
final design/db/finaldesign.eda.qmsg
final design/db/finaldesign.fit.qmsg
final design/db/finaldesign.fnsim.hdb
final design/db/finaldesign.fnsim.qmsg
final design/db/finaldesign.hier_info
final design/db/finaldesign.hif
final design/db/finaldesign.lpc.html
final design/db/finaldesign.lpc.rdb
final design/db/finaldesign.lpc.txt
final design/db/finaldesign.map.bpm
final design/db/finaldesign.map.cdb
final design/db/finaldesign.map.ecobp
final design/db/finaldesign.map.hdb
final design/db/finaldesign.map.kpt
final design/db/finaldesign.map.logdb
final design/db/finaldesign.map.qmsg
final design/db/finaldesign.map_bb.cdb
final design/db/finaldesign.map_bb.hdb
final design/db/finaldesign.map_bb.logdb
final design/db/finaldesign.pre_map.cdb
final design/db/finaldesign.pre_map.hdb
final design/db/finaldesign.rpp.qmsg
final design/db/finaldesign.rtlv.hdb
final design/db/finaldesign.rtlv_sg.cdb
final design/db/finaldesign.rtlv_sg_swap.cdb
final design/db/finaldesign.sgate.rvd
final design/db/finaldesign.sgate_sm.rvd
final design/db/finaldesign.sgdiff.cdb
final design/db/finaldesign.sgdiff.hdb
final design/db/finaldesign.sim.cvwf
final design/db/finaldesign.sim.hdb
final design/db/finaldesign.sim.qmsg
final design/db/finaldesign.sim.rdb
final design/db/finaldesign.simfam
final design/db/finaldesign.sld_design_entry.sci
final design/db/finaldesign.sld_design_entry_dsc.sci
final design/db/finaldesign.syn_hier_info
final design/db/finaldesign.tan.qmsg
final design/db/finaldesign.tis_db_list.ddb
final design/db/finaldesign.tmw_info
final design/db/finaldesign_global_asgn_op.abo
final design/db/prev_cmp_finaldesign.asm.qmsg
final design/db/prev_cmp_finaldesign.eda.qmsg
final design/db/prev_cmp_finaldesign.fit.qmsg
final design/db/prev_cmp_finaldesign.map.qmsg
final design/db/prev_cmp_finaldesign.qmsg
final design/db/prev_cmp_finaldesign.sim.qmsg
final design/db/prev_cmp_finaldesign.tan.qmsg
final design/db/wed.wsf
final design/finaldesign.asm.rpt
final design/finaldesign.done
final design/finaldesign.dpf
final design/finaldesign.eda.rpt
final design/finaldesign.fit.rpt
final design/finaldesign.fit.smsg
final design/finaldesign.fit.summary
final design/finaldesign.flow.rpt
final design/finaldesign.map.rpt
final design/finaldesign.map.summary
final design/finaldesign.pin
final design/finaldesign.qpf
final design/finaldesign.qsf
final design/finaldesign.sim.rpt
final design/finaldesign.tan.rpt
final design/finaldesign.tan.summary
final design/finaldesign_nativelink_simulation.rpt
final design/incremental_db/compiled_partitions/finaldesign.root_partition.cmp.atm
final design/incremental_db/compiled_partitions/finaldesign.root_partition.cmp.dfp
final design/incremental_db/compiled_partitions/finaldesign.root_partition.cmp.hdbx
final design/incremental_db/compiled_partitions/finaldesign.root_partition.cmp.kpt
final design/incremental_db/compiled_partitions/finaldesign.root_partition.cmp.logdb
final design/incremental_db/compiled_partitions/finaldesign.root_partition.cmp.rcf
final design/incremental_db/compiled_partitions/finaldesign.root_partition.map.atm
final design/incremental_db/compiled_partitions/finaldesign.root_partition.map.dpi
final design/incremental_db/compiled_partitions/finaldesign.root_partition.map.hdbx
final design/incremental_db/compiled_partitions/finaldesign.root_partition.map.kpt
final design/incremental_db/README
final design/modelsim.ini
final design/mux16_to1.v.bak
final design/mux16_to_1.v
final design/mux16_to_1.v.bak
final design/mux16_to_1.v.bak.bak
final design/mux16_to_1.vwf
final design/mux8_to_1.v
final design/mux8_to_1.v.bak
final design/mux8_to_1.vwf
final design/serv_req_info.txt
final design/ShiftLeft.v
final design/ShiftRight.v
final design/ShiftRight.v.bak
final design/ShiftRight.vwf
final design/simulation/modelsim/finaldesign.sft
final design/simulation/modelsim/finaldesign.vo
final design/simulation/modelsim/finaldesign_modelsim.xrf
final design/simulation/modelsim/finaldesign_v.sdo
final design/SL_tst.v
final design/SL_tst.v.bak

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