资源列表
11
- 一种基于全变差的红外弱小目标背景抑制方法,效果不错-An infrared small target based background suppression total variation method, good results
djpaper
- 统计论文发表情况,使用python语言中django模板构建-Statistical papers published, use python s django template construct
linux3
- 基于Linux防火墙的嵌入式网络流量控制系统,可供学习linux的人员参考。-Linux-based embedded firewall network traffic control system, learning linux for the reference.
ECG_data
- ECG time series data
ACR-WES-v5--copy
- Wireless Embedded Systems (WEBs) has attracted significant interest in recent years, for instance, Wireless Sensor Networks (WSN), have recently been in the limelight for many domains. The characteristics of WEBs have imposed various restrictions on
diseqc
- The DiSEqCä system is a communication bus between satellite receivers and satellite peripheral equipment, using only the existing coaxial cable. DiSEqCä can be integrated into consumer satellite installations to replace all conventional
CADLAB.FP.90I-(Jafari)
- cpu 16 bit design, university of tehran
272
- Chemical shifts of backbone atoms in proteins are exquisitely sensitive to local conformation, and homologous proteins show quite similar patterns of secondary chemical shifts.
model
- 在此提供一个计算机组成原理模型机设计的文档报告-model
9-IGCH
- matlab code communication
Project-development-documents
- 项目开发文档,可以供软件项目开发人员书写文档。-Project development documentation for the software project developers to write documentation.
Verilog_HDL
- 在微型计算机系统中,CPU与外部的基本通信方式有两种,一种是并行通信即数据的各位同 时传送,其优点是传输速度较快,但数据有多少位就需要多少条传送线;而串行通信中数据一位一位顺序传 送,能节省传送线.用Vefilog HDL语言实现了串并、并串通信接口之间的转换-In the micro-computer systems, CPU basic communication with the outside there are two types of parallel data commun
