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文件名称:clockdiv_teste

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    2014-04-11
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    577.47kb
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Clock division program write in Verilog with selected divider (32 bits)
(系统自动生成,下载前可以参看下载内容)

下载文件列表

clockdiv_teste/output_files/greybox_tmp/cbx_args.txt
clockdiv_teste/incremental_db/compiled_partitions/clockdiv_teste.db_info
clockdiv_teste/incremental_db/compiled_partitions/clockdiv_teste.root_partition.map.hbdb.hb_info
clockdiv_teste/incremental_db/compiled_partitions/clockdiv_teste.root_partition.map.kpt
clockdiv_teste/incremental_db/compiled_partitions/clockdiv_teste.root_partition.map.dpi
clockdiv_teste/incremental_db/compiled_partitions/clockdiv_teste.root_partition.map.cdb
clockdiv_teste/incremental_db/compiled_partitions/clockdiv_teste.root_partition.map.hdb
clockdiv_teste/incremental_db/compiled_partitions/clockdiv_teste.root_partition.map.hbdb.sig
clockdiv_teste/incremental_db/compiled_partitions/clockdiv_teste.root_partition.cmp.dfp
clockdiv_teste/incremental_db/compiled_partitions/clockdiv_teste.root_partition.map.hbdb.hdb
clockdiv_teste/incremental_db/compiled_partitions/clockdiv_teste.root_partition.cmp.logdb
clockdiv_teste/incremental_db/compiled_partitions/clockdiv_teste.root_partition.cmp.rcfdb
clockdiv_teste/incremental_db/compiled_partitions/clockdiv_teste.root_partition.cmp.cdb
clockdiv_teste/incremental_db/compiled_partitions/clockdiv_teste.root_partition.cmp.hdb
clockdiv_teste/incremental_db/compiled_partitions/clockdiv_teste.root_partition.cmp.ammdb
clockdiv_teste/incremental_db/compiled_partitions/clockdiv_teste.root_partition.cmp.kpt
clockdiv_teste/incremental_db/compiled_partitions/clockdiv_teste.root_partition.map.hbdb.cdb
clockdiv_teste/simulation/modelsim/clockdiv_teste_modelsim.xrf
clockdiv_teste/simulation/modelsim/clockdiv_teste.vho
clockdiv_teste/simulation/modelsim/clockdiv_teste_fast.vho
clockdiv_teste/simulation/modelsim/clockdiv_teste_vhd.sdo
clockdiv_teste/simulation/modelsim/clockdiv_teste_vhd_fast.sdo
clockdiv_teste/simulation/modelsim/clockdiv_teste.sft
clockdiv_teste/greybox_tmp/greybox_tmp/mg4h8.v
clockdiv_teste/db/clockdiv_teste.db_info
clockdiv_teste/db/clockdiv_teste.map.qmsg
clockdiv_teste/db/clockdiv_teste.lpc.txt
clockdiv_teste/db/logic_util_heursitic.dat
clockdiv_teste/db/clockdiv_teste.cbx.xml
clockdiv_teste/db/clockdiv_teste.hif
clockdiv_teste/db/clockdiv_teste.(0).cnf.cdb
clockdiv_teste/db/clockdiv_teste.sld_design_entry.sci
clockdiv_teste/db/prev_cmp_clockdiv_teste.qmsg
clockdiv_teste/db/clockdiv_teste.pre_map.hdb
clockdiv_teste/db/clockdiv_teste.smart_action.txt
clockdiv_teste/db/clockdiv_teste.rtlv_sg.cdb
clockdiv_teste/db/clockdiv_teste.tis_db_list.ddb
clockdiv_teste/db/clockdiv_teste.pti_db_list.ddb
clockdiv_teste/db/clockdiv_teste.hier_info
clockdiv_teste/db/clockdiv_teste.(0).cnf.hdb
clockdiv_teste/db/clockdiv_teste.lpc.html
clockdiv_teste/db/clockdiv_teste.map_bb.hdb
clockdiv_teste/db/clockdiv_teste.sgdiff.cdb
clockdiv_teste/db/clockdiv_teste.rtlv.hdb
clockdiv_teste/db/clockdiv_teste.rtlv_sg_swap.cdb
clockdiv_teste/db/clockdiv_teste.sld_design_entry_dsc.sci
clockdiv_teste/db/clockdiv_teste.sgdiff.hdb
clockdiv_teste/db/clockdiv_teste.lpc.rdb
clockdiv_teste/db/clockdiv_teste.map_bb.logdb
clockdiv_teste/db/clockdiv_teste.cmp0.ddb
clockdiv_teste/db/clockdiv_teste.asm.qmsg
clockdiv_teste/db/clockdiv_teste.syn_hier_info
clockdiv_teste/db/clockdiv_teste.root_partition.map.reg_db.cdb
clockdiv_teste/db/clockdiv_teste.sta.qmsg
clockdiv_teste/db/clockdiv_teste.cmp.logdb
clockdiv_teste/db/clockdiv_teste.map.kpt
clockdiv_teste/db/clockdiv_teste.map_bb.cdb
clockdiv_teste/db/clockdiv_teste.fit.qmsg
clockdiv_teste/db/clockdiv_teste.cmp_merge.kpt
clockdiv_teste/db/clockdiv_teste.cmp.rdb
clockdiv_teste/db/clockdiv_teste.cmp1.ddb
clockdiv_teste/db/clockdiv_teste.eda.qmsg
clockdiv_teste/db/clockdiv_teste.(1).cnf.cdb
clockdiv_teste/db/clockdiv_teste.(1).cnf.hdb
clockdiv_teste/db/clockdiv_teste.map.ammdb
clockdiv_teste/db/clockdiv_teste.cmp.kpt
clockdiv_teste/db/clockdiv_teste.routing.rdb
clockdiv_teste/db/clockdiv_teste.pplq.rdb
clockdiv_teste/db/clockdiv_teste.cmp2.ddb
clockdiv_teste/db/clockdiv_teste.(2).cnf.cdb
clockdiv_teste/db/clockdiv_teste.(2).cnf.hdb
clockdiv_teste/db/clockdiv_teste.(3).cnf.cdb
clockdiv_teste/db/clockdiv_teste.(3).cnf.hdb
clockdiv_teste/db/clockdiv_teste.asm.rdb
clockdiv_teste/db/clockdiv_teste.sta.rdb
clockdiv_teste/db/clockdiv_teste.cmp.hdb
clockdiv_teste/db/clockdiv_teste.map.logdb
clockdiv_teste/db/clockdiv_teste.tmw_info
clockdiv_teste/db/clockdiv_teste.vpr.ammdb
clockdiv_teste/db/clockdiv_teste.map.cdb
clockdiv_teste/db/clockdiv_teste.map.hdb
clockdiv_teste/db/clockdiv_teste.cmp.cdb
clockdiv_teste/db/clockdiv_teste.cmp.idb
clockdiv_teste/db/clockdiv_teste.map.bpm
clockdiv_teste/db/clockdiv_teste.map.rdb
clockdiv_teste/db/clockdiv_teste.cmp.bpm
clockdiv_teste/db/clockdiv_teste.asm_labs.ddb
clockdiv_teste/db/clockdiv_teste.sta_cmp.8_slow.tdb
clockdiv_teste/db/clockdiv_teste.ipinfo
clockdiv_teste/output_files/clockdiv_teste.map.summary
clockdiv_teste/output_files/clockdiv_teste.map.rpt
clockdiv_teste/output_files/clockdiv_teste.flow.rpt
clockdiv_teste/output_files/clockdiv_teste.pin
clockdiv_teste/output_files/clockdiv_teste.fit.smsg
clockdiv_teste/output_files/clockdiv_teste.fit.summary
clockdiv_teste/output_files/clockdiv_teste.fit.rpt
clockdiv_teste/out

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