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文件名称:ChengFaQi_mux16

  • 所属分类：
    VHDL-FPGA-Verilog
  • 标签属性：
    [VHDL] [源码]
  • 上传时间：
    2014-04-30
  • 文件大小：
    798.36kb
  • 已下载：
    0次
  • 提 供 者：
    望***
  • 相关连接：
    无
  • 下载说明：
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实现16位乘法器 并有modelsim仿真文件-The realization of the 16 bit multiplier and Modelsim simulation file!!!!!!!!!!!!!!!!!!!!!!!!
(系统自动生成,下载前可以参看下载内容)

下载文件列表

ChengFaQi_mux16/db/logic_util_heursitic.dat
ChengFaQi_mux16/db/mux16.(0).cnf.cdb
ChengFaQi_mux16/db/mux16.(0).cnf.hdb
ChengFaQi_mux16/db/mux16.asm.qmsg
ChengFaQi_mux16/db/mux16.asm_labs.ddb
ChengFaQi_mux16/db/mux16.cbx.xml
ChengFaQi_mux16/db/mux16.cmp.cdb
ChengFaQi_mux16/db/mux16.cmp.hdb
ChengFaQi_mux16/db/mux16.cmp.kpt
ChengFaQi_mux16/db/mux16.cmp.logdb
ChengFaQi_mux16/db/mux16.cmp.rdb
ChengFaQi_mux16/db/mux16.cmp.tdb
ChengFaQi_mux16/db/mux16.cmp0.ddb
ChengFaQi_mux16/db/mux16.db_info
ChengFaQi_mux16/db/mux16.eco.cdb
ChengFaQi_mux16/db/mux16.eda.qmsg
ChengFaQi_mux16/db/mux16.fit.qmsg
ChengFaQi_mux16/db/mux16.hier_info
ChengFaQi_mux16/db/mux16.hif
ChengFaQi_mux16/db/mux16.lpc.html
ChengFaQi_mux16/db/mux16.lpc.rdb
ChengFaQi_mux16/db/mux16.lpc.txt
ChengFaQi_mux16/db/mux16.map.cdb
ChengFaQi_mux16/db/mux16.map.hdb
ChengFaQi_mux16/db/mux16.map.logdb
ChengFaQi_mux16/db/mux16.map.qmsg
ChengFaQi_mux16/db/mux16.pre_map.cdb
ChengFaQi_mux16/db/mux16.pre_map.hdb
ChengFaQi_mux16/db/mux16.rtlv.hdb
ChengFaQi_mux16/db/mux16.rtlv_sg.cdb
ChengFaQi_mux16/db/mux16.rtlv_sg_swap.cdb
ChengFaQi_mux16/db/mux16.sgdiff.cdb
ChengFaQi_mux16/db/mux16.sgdiff.hdb
ChengFaQi_mux16/db/mux16.sim.cvwf
ChengFaQi_mux16/db/mux16.sld_design_entry.sci
ChengFaQi_mux16/db/mux16.sld_design_entry_dsc.sci
ChengFaQi_mux16/db/mux16.syn_hier_info
ChengFaQi_mux16/db/mux16.tan.qmsg
ChengFaQi_mux16/db/mux16.tis_db_list.ddb
ChengFaQi_mux16/db/mux16.tmw_info
ChengFaQi_mux16/db/mux16_global_asgn_op.abo
ChengFaQi_mux16/db/prev_cmp_mux16.asm.qmsg
ChengFaQi_mux16/db/prev_cmp_mux16.eda.qmsg
ChengFaQi_mux16/db/prev_cmp_mux16.fit.qmsg
ChengFaQi_mux16/db/prev_cmp_mux16.map.qmsg
ChengFaQi_mux16/db/prev_cmp_mux16.qmsg
ChengFaQi_mux16/db/prev_cmp_mux16.tan.qmsg
ChengFaQi_mux16/db/wed.wsf
ChengFaQi_mux16/incremental_db/compiled_partitions/mux16.root_partition.map.kpt
ChengFaQi_mux16/incremental_db/README
ChengFaQi_mux16/mux16.asm.rpt
ChengFaQi_mux16/mux16.done
ChengFaQi_mux16/mux16.eda.rpt
ChengFaQi_mux16/mux16.fit.rpt
ChengFaQi_mux16/mux16.fit.smsg
ChengFaQi_mux16/mux16.fit.summary
ChengFaQi_mux16/mux16.flow.rpt
ChengFaQi_mux16/mux16.map.rpt
ChengFaQi_mux16/mux16.map.smsg
ChengFaQi_mux16/mux16.map.summary
ChengFaQi_mux16/mux16.pin
ChengFaQi_mux16/mux16.pof
ChengFaQi_mux16/mux16.qpf
ChengFaQi_mux16/mux16.qsf
ChengFaQi_mux16/mux16.qws
ChengFaQi_mux16/mux16.sim.rpt
ChengFaQi_mux16/mux16.tan.rpt
ChengFaQi_mux16/mux16.tan.summary
ChengFaQi_mux16/mux16.v
ChengFaQi_mux16/mux16.v.bak
ChengFaQi_mux16/mux16.vwf
ChengFaQi_mux16/mux16_assignment_defaults.qdf
ChengFaQi_mux16/mux16_nativelink_simulation.rpt
ChengFaQi_mux16/simulation/modelsim/maxii_atoms.v
ChengFaQi_mux16/simulation/modelsim/modelsim.ini
ChengFaQi_mux16/simulation/modelsim/msim_transcript
ChengFaQi_mux16/simulation/modelsim/mux16.sft
ChengFaQi_mux16/simulation/modelsim/mux16.vo
ChengFaQi_mux16/simulation/modelsim/mux16_modelsim.xrf
ChengFaQi_mux16/simulation/modelsim/mux16_run_msim_rtl_verilog.do
ChengFaQi_mux16/simulation/modelsim/mux16_run_msim_rtl_verilog.do.bak
ChengFaQi_mux16/simulation/modelsim/mux16_v.sdo
ChengFaQi_mux16/simulation/modelsim/rtl_work/mux16/verilog.psm
ChengFaQi_mux16/simulation/modelsim/rtl_work/mux16/_primary.dat
ChengFaQi_mux16/simulation/modelsim/rtl_work/mux16/_primary.dbs
ChengFaQi_mux16/simulation/modelsim/rtl_work/mux16/_primary.vhd
ChengFaQi_mux16/simulation/modelsim/rtl_work/vtf_test/verilog.psm
ChengFaQi_mux16/simulation/modelsim/rtl_work/vtf_test/_primary.dat
ChengFaQi_mux16/simulation/modelsim/rtl_work/vtf_test/_primary.dbs
ChengFaQi_mux16/simulation/modelsim/rtl_work/vtf_test/_primary.vhd
ChengFaQi_mux16/simulation/modelsim/rtl_work/_info
ChengFaQi_mux16/simulation/modelsim/rtl_work/_vmake
ChengFaQi_mux16/simulation/modelsim/vsim.wlf
ChengFaQi_mux16/simulation/modelsim/vtf_test.v
ChengFaQi_mux16/simulation/modelsim/rtl_work/mux16
ChengFaQi_mux16/simulation/modelsim/rtl_work/vtf_test
ChengFaQi_mux16/simulation/modelsim/rtl_work/_temp
ChengFaQi_mux16/simulation/modelsim/rtl_work
ChengFaQi_mux16/incremental_db/compiled_partitions
ChengFaQi_mux16/simulation/modelsim
ChengFaQi_mux16/db
ChengFaQi_mux16/incremental_db
ChengFaQi_mux16/simulation
ChengFaQi_mux16

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