On-chip routers typically have buffers dedicated

to their input or output ports for temporarily storing packets

in case contention occurs on output physical channels. Buffers,

unfortunately, consume significant portions of router area and

power budgets. While running a traffic trace, however, not all

input ports of routers have incoming packets needed to be

transferred simultaneously. Therefore, a large number of buffer

queues in the network are empty and other queues are mostly

busy. This observation motivates us to design router architecture

with shared queues (RoShaQ), router architecture that maximizes

buffer utilization by allowing the sharing multiple buffer

queues among input ports. Sharing queues, in fact, makes using

buffers more efficient hence is able to achieve higher throughput

when the network load becomes heavy. On the other side, at

light traffic load, our router achieves low latency by allowing

packets to effectively bypass these shared queues.