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文件名称:uart_yll_pro

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  • 上传时间:
    2015-11-16
  • 文件大小:
    474.81kb
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基于CPLD的 I2C通信,模块化设计,已在示波器上验证-CPLD The I2C communication, based on a modular design, verified on an oscilloscope
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下载文件列表

uart_yll_pro/bbff.v
uart_yll_pro/bbff.v.bak
uart_yll_pro/db/prev_cmp_uart_yll.asm.qmsg
uart_yll_pro/db/prev_cmp_uart_yll.eda.qmsg
uart_yll_pro/db/prev_cmp_uart_yll.fit.qmsg
uart_yll_pro/db/prev_cmp_uart_yll.map.qmsg
uart_yll_pro/db/prev_cmp_uart_yll.qmsg
uart_yll_pro/db/prev_cmp_uart_yll.sim.qmsg
uart_yll_pro/db/prev_cmp_uart_yll.tan.qmsg
uart_yll_pro/db/uart_yll.(0).cnf.cdb
uart_yll_pro/db/uart_yll.(0).cnf.hdb
uart_yll_pro/db/uart_yll.(1).cnf.cdb
uart_yll_pro/db/uart_yll.(1).cnf.hdb
uart_yll_pro/db/uart_yll.(2).cnf.cdb
uart_yll_pro/db/uart_yll.(2).cnf.hdb
uart_yll_pro/db/uart_yll.(3).cnf.cdb
uart_yll_pro/db/uart_yll.(3).cnf.hdb
uart_yll_pro/db/uart_yll.(4).cnf.cdb
uart_yll_pro/db/uart_yll.(4).cnf.hdb
uart_yll_pro/db/uart_yll.(5).cnf.cdb
uart_yll_pro/db/uart_yll.(5).cnf.hdb
uart_yll_pro/db/uart_yll.(6).cnf.cdb
uart_yll_pro/db/uart_yll.(6).cnf.hdb
uart_yll_pro/db/uart_yll.asm.qmsg
uart_yll_pro/db/uart_yll.asm_labs.ddb
uart_yll_pro/db/uart_yll.atom_map.rvd
uart_yll_pro/db/uart_yll.cbx.xml
uart_yll_pro/db/uart_yll.cmp.cdb
uart_yll_pro/db/uart_yll.cmp.hdb
uart_yll_pro/db/uart_yll.cmp.logdb
uart_yll_pro/db/uart_yll.cmp.rdb
uart_yll_pro/db/uart_yll.cmp.tdb
uart_yll_pro/db/uart_yll.cmp0.ddb
uart_yll_pro/db/uart_yll.db_info
uart_yll_pro/db/uart_yll.eco.cdb
uart_yll_pro/db/uart_yll.eda.qmsg
uart_yll_pro/db/uart_yll.eds_overflow
uart_yll_pro/db/uart_yll.fit.qmsg
uart_yll_pro/db/uart_yll.hier_info
uart_yll_pro/db/uart_yll.hif
uart_yll_pro/db/uart_yll.map.cdb
uart_yll_pro/db/uart_yll.map.hdb
uart_yll_pro/db/uart_yll.map.logdb
uart_yll_pro/db/uart_yll.map.qmsg
uart_yll_pro/db/uart_yll.pre_map.cdb
uart_yll_pro/db/uart_yll.pre_map.hdb
uart_yll_pro/db/uart_yll.rpp.qmsg
uart_yll_pro/db/uart_yll.rtlv.hdb
uart_yll_pro/db/uart_yll.rtlv_sg.cdb
uart_yll_pro/db/uart_yll.rtlv_sg_swap.cdb
uart_yll_pro/db/uart_yll.sgate.rvd
uart_yll_pro/db/uart_yll.sgate_sm.rvd
uart_yll_pro/db/uart_yll.sgdiff.cdb
uart_yll_pro/db/uart_yll.sgdiff.hdb
uart_yll_pro/db/uart_yll.signalprobe.cdb
uart_yll_pro/db/uart_yll.sim.cvwf
uart_yll_pro/db/uart_yll.sim.hdb
uart_yll_pro/db/uart_yll.sim.qmsg
uart_yll_pro/db/uart_yll.sim.rdb
uart_yll_pro/db/uart_yll.sld_design_entry.sci
uart_yll_pro/db/uart_yll.sld_design_entry_dsc.sci
uart_yll_pro/db/uart_yll.syn_hier_info
uart_yll_pro/db/uart_yll.tan.qmsg
uart_yll_pro/db/uart_yll.tis_db_list.ddb
uart_yll_pro/db/uart_yll.tmw_info
uart_yll_pro/db/wed.wsf
uart_yll_pro/rcv.bsf
uart_yll_pro/rcv.v
uart_yll_pro/rcv.v.bak
uart_yll_pro/rcv.vPreview
uart_yll_pro/Set_Baud.bsf
uart_yll_pro/Set_Baud.v
uart_yll_pro/Set_Baud.v.bak
uart_yll_pro/simulation/modelsim/uart_yll.sft
uart_yll_pro/simulation/modelsim/uart_yll.vo
uart_yll_pro/simulation/modelsim/uart_yll_modelsim.xrf
uart_yll_pro/simulation/modelsim/uart_yll_v.sdo
uart_yll_pro/timing/primetime/uart_yll.vo
uart_yll_pro/timing/primetime/uart_yll_pt_v.tcl
uart_yll_pro/timing/primetime/uart_yll_v.sdo
uart_yll_pro/txd.bsf
uart_yll_pro/TXD.v
uart_yll_pro/TXD.v.bak
uart_yll_pro/txd2.bsf
uart_yll_pro/txd2.v
uart_yll_pro/txd2.v.bak
uart_yll_pro/txdd.bsf
uart_yll_pro/uart.v
uart_yll_pro/uart_yll.asm.rpt
uart_yll_pro/uart_yll.bdf
uart_yll_pro/uart_yll.cdf
uart_yll_pro/uart_yll.done
uart_yll_pro/uart_yll.dpf
uart_yll_pro/uart_yll.eda.rpt
uart_yll_pro/uart_yll.fit.rpt
uart_yll_pro/uart_yll.fit.smsg
uart_yll_pro/uart_yll.fit.summary
uart_yll_pro/uart_yll.flow.rpt
uart_yll_pro/uart_yll.map.rpt
uart_yll_pro/uart_yll.map.smsg
uart_yll_pro/uart_yll.map.summary
uart_yll_pro/uart_yll.pin
uart_yll_pro/uart_yll.pof
uart_yll_pro/uart_yll.qpf
uart_yll_pro/uart_yll.qsf
uart_yll_pro/uart_yll.qws
uart_yll_pro/uart_yll.sim.rpt
uart_yll_pro/uart_yll.tan.rpt
uart_yll_pro/uart_yll.tan.summary
uart_yll_pro/uart_yll.vwf
uart_yll_pro/Verilog1.v
uart_yll_pro/Verilog2.v
uart_yll_pro/Verilog2.v.bak
uart_yll_pro/simulation/modelsim
uart_yll_pro/timing/primetime
uart_yll_pro/db
uart_yll_pro/simulation
uart_yll_pro/timing
uart_yll_pro

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