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文件名称:zynq_xadc3

  • 所属分类：
    嵌入式/单片机编程
  • 标签属性：
    [源码] [VHDL]
  • 上传时间：
    2018-04-19
  • 文件大小：
    35.48mb
  • 已下载：
    2次
  • 提 供 者：
    cuop*****
  • 相关连接：
    无
  • 下载说明：
    别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

采集外部设备的电压值，用FPGA内部自带的XADC(Collect the voltage value of the external device and use the internal XADC of the FPGA)
相关搜索： Zynq020 xadc采集电压 verilog FPGA

(系统自动生成,下载前可以参看下载内容)

下载文件列表

zynq_xadc3/xadc_wiz_0_ex/imports/design.txt
zynq_xadc3/xadc_wiz_0_ex/imports/xadc_wiz_0_exdes.v
zynq_xadc3/xadc_wiz_0_ex/imports/xadc_wiz_0_exdes.xdc
zynq_xadc3/xadc_wiz_0_ex/imports/xadc_wiz_0_tb.v
zynq_xadc3/xadc_wiz_0_ex/min_area_pfile.tmp
zynq_xadc3/xadc_wiz_0_ex/vivado.jou
zynq_xadc3/xadc_wiz_0_ex/vivado.log
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.cache/ip/2017.3/3f839877dd05cb99/3f839877dd05cb99.xci
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.cache/ip/2017.3/3f839877dd05cb99/ila_0.dcp
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.cache/ip/2017.3/3f839877dd05cb99/ila_0_sim_netlist.v
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.cache/ip/2017.3/3f839877dd05cb99/ila_0_sim_netlist.vhdl
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.cache/ip/2017.3/3f839877dd05cb99/ila_0_stub.v
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.cache/ip/2017.3/3f839877dd05cb99/ila_0_stub.vhdl
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.cache/ip/2017.3/3f839877dd05cb99.logs/runme.log
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.cache/ip/2017.3/a18d9e1eb5766282/a18d9e1eb5766282.xci
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.cache/ip/2017.3/a18d9e1eb5766282/dbg_hub_CV.dcp
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.cache/ip/2017.3/d6c7e254e2161f5a/clk_wiz_0.dcp
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.cache/ip/2017.3/d6c7e254e2161f5a/clk_wiz_0_sim_netlist.v
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.cache/ip/2017.3/d6c7e254e2161f5a/clk_wiz_0_sim_netlist.vhdl
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.cache/ip/2017.3/d6c7e254e2161f5a/clk_wiz_0_stub.v
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.cache/ip/2017.3/d6c7e254e2161f5a/clk_wiz_0_stub.vhdl
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.cache/ip/2017.3/d6c7e254e2161f5a/d6c7e254e2161f5a.xci
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.cache/ip/2017.3/d6c7e254e2161f5a.logs/runme.log
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.cache/ip/2017.3/fbdeb277fb275070/fbdeb277fb275070.xci
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.cache/ip/2017.3/fbdeb277fb275070/vio.dcp
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.cache/ip/2017.3/fbdeb277fb275070/vio_sim_netlist.v
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.cache/ip/2017.3/fbdeb277fb275070/vio_sim_netlist.vhdl
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.cache/ip/2017.3/fbdeb277fb275070/vio_stub.v
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.cache/ip/2017.3/fbdeb277fb275070/vio_stub.vhdl
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.cache/ip/2017.3/fbdeb277fb275070.logs/runme.log
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.cache/wt/gui_handlers.wdf
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.cache/wt/java_command_handlers.wdf
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.cache/wt/project.wpc
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.cache/wt/synthesis.wdf
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.cache/wt/synthesis_details.wdf
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.cache/wt/webtalk_pa.xml
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.hw/backup/hw_ila_data_1.ila
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.hw/hw_1/hw.xml
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.hw/hw_1/wave/hw_ila_data_1/hw_ila_data_1.wcfg
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.hw/hw_1/wave/hw_ila_data_1/hw_ila_data_1.wdb
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.hw/xadc_wiz_0_ex.lpr
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.ip_user_files/ip/clk_wiz_0/clk_wiz_0.veo
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.ip_user_files/ip/clk_wiz_0/clk_wiz_0_stub.v
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.ip_user_files/ip/clk_wiz_0/clk_wiz_0_stub.vhdl
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.ip_user_files/ip/ila_0/ila_0.veo
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.ip_user_files/ip/ila_0/ila_0_stub.v
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.ip_user_files/ip/ila_0/ila_0_stub.vhdl
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.ip_user_files/ip/vio/vio.veo
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.ip_user_files/ip/vio/vio.vho
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.ip_user_files/ip/vio/vio_stub.v
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.ip_user_files/ip/vio/vio_stub.vhdl
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.ip_user_files/ip/xadc_wiz_0/xadc_wiz_0.veo
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.ip_user_files/ip/xadc_wiz_0/xadc_wiz_0.vho
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.ip_user_files/mem_init_files/design.txt
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.ip_user_files/README.txt
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.ip_user_files/sim_scripts/clk_wiz_0/activehdl/clk_wiz_0.sh
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.ip_user_files/sim_scripts/clk_wiz_0/activehdl/clk_wiz_0.udo
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.ip_user_files/sim_scripts/clk_wiz_0/activehdl/compile.do
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.ip_user_files/sim_scripts/clk_wiz_0/activehdl/file_info.txt
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.ip_user_files/sim_scripts/clk_wiz_0/activehdl/glbl.v
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.ip_user_files/sim_scripts/clk_wiz_0/activehdl/README.txt
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.ip_user_files/sim_scripts/clk_wiz_0/activehdl/simulate.do
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.ip_user_files/sim_scripts/clk_wiz_0/activehdl/wave.do
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.ip_user_files/sim_scripts/clk_wiz_0/ies/clk_wiz_0.sh
zynq_xadc3/xadc_wiz_0_ex/xadc_wiz_0_ex.ip_user_files/sim_scripts/clk_wiz_0/ies/fi

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