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文件名称:master_slave

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  • 上传时间:
    2019-03-22
  • 文件大小:
    11.9mb
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    2次
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AXI4-Lite总线的主从机读写,例程及代码(AXI4-Lite Bus Host-Slave Read-Write, Routine and Code)
相关搜索: axi4-lite

(系统自动生成,下载前可以参看下载内容)

下载文件列表

文件名大小更新时间
master_slave\master_ip\myip_master_1.0\bd\bd.tcl 7835 2018-05-21
master_slave\master_ip\myip_master_1.0\component.xml 37573 2018-05-21
master_slave\master_ip\myip_master_1.0\example_designs\bfm_design\design.tcl 4350 2018-05-21
master_slave\master_ip\myip_master_1.0\example_designs\bfm_design\myip_master_v1_0_tb.sv 3618 2018-05-21
master_slave\master_ip\myip_master_1.0\example_designs\debug_hw_design\design.tcl 13202 2018-05-21
master_slave\master_ip\myip_master_1.0\example_designs\debug_hw_design\myip_master_v1_0_hw_test.tcl 3496 2018-05-21
master_slave\master_ip\myip_master_1.0\hdl\myip_master_v1_0.v 2854 2018-05-21
master_slave\master_ip\myip_master_1.0\hdl\myip_master_v1_0_M00_AXI.v 45969 2018-05-21
master_slave\master_ip\myip_master_1.0\xgui\myip_master_v1_0.tcl 5540 2018-05-21
master_slave\project_2.cache\wt\gui_handlers.wdf 5687 2019-03-21
master_slave\project_2.cache\wt\gui_resources.wdf 5736 2018-06-06
master_slave\project_2.cache\wt\java_command_handlers.wdf 2241 2019-03-21
master_slave\project_2.cache\wt\project.wpc 62 2019-03-21
master_slave\project_2.cache\wt\synthesis.wdf 5380 2018-05-21
master_slave\project_2.cache\wt\webtalk_pa.xml 5983 2019-03-21
master_slave\project_2.cache\wt\xsim.wdf 239 2019-02-26
master_slave\project_2.hw\project_2.lpr 290 2018-05-21
master_slave\project_2.ip_user_files\ip\myip_master_0\myip_master_0.veo 4797 2019-02-26
master_slave\project_2.ip_user_files\ip\myip_master_0\myip_master_0.vho 5009 2019-02-26
master_slave\project_2.ip_user_files\ip\myip_master_0\myip_master_0_stub.v 2657 2018-05-21
master_slave\project_2.ip_user_files\ip\myip_master_0\myip_master_0_stub.vhdl 2697 2018-05-21
master_slave\project_2.ip_user_files\ip\myip_Slave_0\myip_Slave_0.veo 4338 2019-02-26
master_slave\project_2.ip_user_files\ip\myip_Slave_0\myip_Slave_0.vho 4757 2019-02-26
master_slave\project_2.ip_user_files\ip\myip_Slave_0\myip_Slave_0_stub.v 2450 2018-05-21
master_slave\project_2.ip_user_files\ip\myip_Slave_0\myip_Slave_0_stub.vhdl 2514 2018-05-21
master_slave\project_2.ip_user_files\mem_init_files\Makefile 479 2018-05-21
master_slave\project_2.ip_user_files\mem_init_files\myip_Slave.h 2513 2018-05-21
master_slave\project_2.ip_user_files\mem_init_files\myip_Slave.mdd 195 2018-05-21
master_slave\project_2.ip_user_files\mem_init_files\myip_Slave.tcl 172 2018-05-21
master_slave\project_2.ip_user_files\README.txt 130 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_master_0\activehdl\compile.do 442 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_master_0\activehdl\file_info.txt 411 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_master_0\activehdl\glbl.v 1474 2017-04-13
master_slave\project_2.ip_user_files\sim_scripts\myip_master_0\activehdl\myip_master_0.sh 4850 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_master_0\activehdl\myip_master_0.udo 0 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_master_0\activehdl\README.txt 2215 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_master_0\activehdl\simulate.do 311 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_master_0\activehdl\wave.do 32 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_master_0\ies\file_info.txt 411 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_master_0\ies\glbl.v 1474 2017-04-13
master_slave\project_2.ip_user_files\sim_scripts\myip_master_0\ies\myip_master_0.sh 5518 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_master_0\ies\README.txt 2215 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_master_0\ies\run.f 349 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_master_0\modelsim\compile.do 430 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_master_0\modelsim\file_info.txt 411 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_master_0\modelsim\glbl.v 1474 2017-04-13
master_slave\project_2.ip_user_files\sim_scripts\myip_master_0\modelsim\myip_master_0.sh 4851 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_master_0\modelsim\myip_master_0.udo 0 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_master_0\modelsim\README.txt 2215 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_master_0\modelsim\simulate.do 312 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_master_0\modelsim\wave.do 32 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_master_0\questa\compile.do 424 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_master_0\questa\elaborate.do 184 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_master_0\questa\file_info.txt 411 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_master_0\questa\glbl.v 1474 2017-04-13
master_slave\project_2.ip_user_files\sim_scripts\myip_master_0\questa\myip_master_0.sh 4968 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_master_0\questa\myip_master_0.udo 0 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_master_0\questa\README.txt 2215 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_master_0\questa\simulate.do 203 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_master_0\questa\wave.do 32 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_master_0\README.txt 3236 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_master_0\riviera\compile.do 436 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_master_0\riviera\file_info.txt 411 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_master_0\riviera\glbl.v 1474 2017-04-13
master_slave\project_2.ip_user_files\sim_scripts\myip_master_0\riviera\myip_master_0.sh 4849 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_master_0\riviera\myip_master_0.udo 0 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_master_0\riviera\README.txt 2215 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_master_0\riviera\simulate.do 311 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_master_0\riviera\wave.do 32 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_master_0\vcs\file_info.txt 411 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_master_0\vcs\glbl.v 1474 2017-04-13
master_slave\project_2.ip_user_files\sim_scripts\myip_master_0\vcs\myip_master_0.sh 6675 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_master_0\vcs\README.txt 2215 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_master_0\vcs\simulate.do 11 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_master_0\xsim\cmd.tcl 464 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_master_0\xsim\elab.opt 196 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_master_0\xsim\file_info.txt 411 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_master_0\xsim\glbl.v 1474 2017-04-13
master_slave\project_2.ip_user_files\sim_scripts\myip_master_0\xsim\myip_master_0.sh 6335 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_master_0\xsim\README.txt 2215 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_master_0\xsim\vlog.prj 358 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_master_0\xsim\xsim.ini 17397 2017-04-15
master_slave\project_2.ip_user_files\sim_scripts\myip_Slave_0\activehdl\compile.do 436 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_Slave_0\activehdl\file_info.txt 402 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_Slave_0\activehdl\glbl.v 1474 2017-04-13
master_slave\project_2.ip_user_files\sim_scripts\myip_Slave_0\activehdl\Makefile 479 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_Slave_0\activehdl\myip_Slave.h 2513 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_Slave_0\activehdl\myip_Slave.mdd 195 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_Slave_0\activehdl\myip_Slave.tcl 172 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_Slave_0\activehdl\myip_Slave_0.sh 4837 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_Slave_0\activehdl\myip_Slave_0.udo 0 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_Slave_0\activehdl\README.txt 2210 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_Slave_0\activehdl\simulate.do 308 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_Slave_0\activehdl\wave.do 32 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_Slave_0\ies\file_info.txt 402 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_Slave_0\ies\glbl.v 1474 2017-04-13
master_slave\project_2.ip_user_files\sim_scripts\myip_Slave_0\ies\Makefile 479 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_Slave_0\ies\myip_Slave.h 2513 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_Slave_0\ies\myip_Slave.mdd 195 2018-05-21
master_slave\project_2.ip_user_files\sim_scripts\myip_Slave_0\ies\myip_Slave.tcl 172 2018-05-21

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