压缩包 : fifo.rar 列表
11/design/ex_fifo.v
11/design/fifomem.v
11/design/r_ctrl.v
11/design/w_ctrl.v
11/sim/ex_fifo.cr.mti
11/sim/ex_fifo.mpf
11/sim/lib/blk_mem_gen_v8_4.v
11/sim/run.do
11/sim/tb_ex_fifo.v
11/sim/vsim.wlf
11/sim/work/@_opt/_lib.qdb
11/sim/work/@_opt/_lib1_0.qdb
11/sim/work/@_opt/_lib1_0.qpg
11/sim/work/@_opt/_lib1_0.qtl
11/sim/work/@_opt/_lib2_0.qdb
11/sim/work/@_opt/_lib2_0.qpg
11/sim/work/@_opt/_lib2_0.qtl
11/sim/work/@_opt/_lib3_0.qdb
11/sim/work/@_opt/_lib3_0.qpg
11/sim/work/@_opt/_lib3_0.qtl
11/sim/work/@_opt/_lib4_0.qdb
11/sim/work/@_opt/_lib4_0.qpg
11/sim/work/@_opt/_lib4_0.qtl
11/sim/work/@_opt/_lib5_0.qdb
11/sim/work/@_opt/_lib5_0.qpg
11/sim/work/@_opt/_lib5_0.qtl
11/sim/work/_info
11/sim/work/_lib.qdb
11/sim/work/_lib1_1.qdb
11/sim/work/_lib1_1.qpg
11/sim/work/_lib1_1.qtl
11/sim/work/_vmake
11/vivado_prj/ex_fifo/ex_fifo.cache/ip/2020.1/37fabf216c65946e/37fabf216c65946e.xci
11/vivado_prj/ex_fifo/ex_fifo.cache/ip/2020.1/37fabf216c65946e/dp_ram_8x256_swsr.dcp
11/vivado_prj/ex_fifo/ex_fifo.cache/ip/2020.1/37fabf216c65946e/dp_ram_8x256_swsr_sim_netlist.v
11/vivado_prj/ex_fifo/ex_fifo.cache/ip/2020.1/37fabf216c65946e/dp_ram_8x256_swsr_sim_netlist.vhdl
11/vivado_prj/ex_fifo/ex_fifo.cache/ip/2020.1/37fabf216c65946e/dp_ram_8x256_swsr_stub.v
11/vivado_prj/ex_fifo/ex_fifo.cache/ip/2020.1/37fabf216c65946e/dp_ram_8x256_swsr_stub.vhdl
11/vivado_prj/ex_fifo/ex_fifo.cache/wt/gui_handlers.wdf
11/vivado_prj/ex_fifo/ex_fifo.cache/wt/java_command_handlers.wdf
11/vivado_prj/ex_fifo/ex_fifo.cache/wt/project.wpc
11/vivado_prj/ex_fifo/ex_fifo.cache/wt/synthesis.wdf
11/vivado_prj/ex_fifo/ex_fifo.cache/wt/webtalk_pa.xml
11/vivado_prj/ex_fifo/ex_fifo.hw/ex_fifo.lpr
11/vivado_prj/ex_fifo/ex_fifo.ip_user_files/ip/dp_ram_8x256_swsr/dp_ram_8x256_swsr.veo
11/vivado_prj/ex_fifo/ex_fifo.ip_user_files/ip/dp_ram_8x256_swsr/dp_ram_8x256_swsr.vho
11/vivado_prj/ex_fifo/ex_fifo.ip_user_files/ip/dp_ram_8x256_swsr/dp_ram_8x256_swsr_stub.v
11/vivado_prj/ex_fifo/ex_fifo.ip_user_files/ip/dp_ram_8x256_swsr/dp_ram_8x256_swsr_stub.vhdl
11/vivado_prj/ex_fifo/ex_fifo.ip_user_files/ipstatic/simulation/blk_mem_gen_v8_4.v
11/vivado_prj/ex_fifo/ex_fifo.ip_user_files/mem_init_files/summary.log
11/vivado_prj/ex_fifo/ex_fifo.ip_user_files/README.txt
11/vivado_prj/ex_fifo/ex_fifo.ip_user_files/sim_scripts/dp_ram_8x256_swsr/activehdl/compile.do
11/vivado_prj/ex_fifo/ex_fifo.ip_user_files/sim_scripts/dp_ram_8x256_swsr/activehdl/dp_ram_8x256_swsr.sh
11/vivado_prj/ex_fifo/ex_fifo.ip_user_files/sim_scripts/dp_ram_8x256_swsr/activehdl/dp_ram_8x256_swsr.udo
11/vivado_prj/ex_fifo/ex_fifo.ip_user_files/sim_scripts/dp_ram_8x256_swsr/activehdl/file_info.txt
11/vivado_prj/ex_fifo/ex_fifo.ip_user_files/sim_scripts/dp_ram_8x256_swsr/activehdl/glbl.v
11/vivado_prj/ex_fifo/ex_fifo.ip_user_files/sim_scripts/dp_ram_8x256_swsr/activehdl/README.txt
11/vivado_prj/ex_fifo/ex_fifo.ip_user_files/sim_scripts/dp_ram_8x256_swsr/activehdl/simulate.do
11/vivado_prj/ex_fifo/ex_fifo.ip_user_files/sim_scripts/dp_ram_8x256_swsr/activehdl/summary.log
11/vivado_prj/ex_fifo/ex_fifo.ip_user_files/sim_scripts/dp_ram_8x256_swsr/activehdl/wave.do
11/vivado_prj/ex_fifo/ex_fifo.ip_user_files/sim_scripts/dp_ram_8x256_swsr/ies/dp_ram_8x256_swsr.sh
11/vivado_prj/ex_fifo/ex_fifo.ip_user_files/sim_scripts/dp_ram_8x256_swsr/ies/file_info.txt
11/vivado_prj/ex_fifo/ex_fifo.ip_user_files/sim_scripts/dp_ram_8x256_swsr/ies/glbl.v
11/vivado_prj/ex_fifo/ex_fifo.ip_user_files/sim_scripts/dp_ram_8x256_swsr/ies/README.txt
11/vivado_prj/ex_fifo/ex_fifo.ip_user_files/sim_scripts/dp_ram_8x256_swsr/ies/run.f
11/vivado_prj/ex_fifo/ex_fifo.ip_user_files/sim_scripts/dp_ram_8x256_swsr/ies/summary.log
11/vivado_prj/ex_fifo/ex_fifo.ip_user_files/sim_scripts/dp_ram_8x256_swsr/modelsim/compile.do
11/vivado_prj/ex_fifo/ex_fifo.ip_user_files/sim_scripts/dp_ram_8x256_swsr/modelsim/dp_ram_8x256_swsr.sh
11/vivado_prj/ex_fifo/ex_fifo.ip_user_files/sim_scripts/dp_ram_8x256_swsr/modelsim/dp_ram_8x256_swsr.udo
11/vivado_prj/ex_fifo/ex_fifo.ip_user_files/sim_scripts/dp_ram_8x256_swsr/modelsim/file_info.txt
11/vivado_prj/ex_fifo/ex_fifo.ip_user_files/sim_scripts/dp_ram_8x256_swsr/modelsim/glbl.v
11/vivado_prj/ex_fifo/ex_fifo.ip_user_files/sim_scripts/dp_ram_8x256_swsr/modelsim/README.txt
11/vivado_prj/ex_fifo/ex_fifo.ip_user_files/sim_scripts/dp_ram_8x256_swsr/modelsim/simulate.do
11/vivado_prj/ex_fifo/ex_fifo.ip_user_files/sim_scripts/dp_ram_8x256_swsr/modelsim/summary.log
11/vivado_prj/ex_fifo/ex_fifo.ip_user_files/sim_scripts/dp_ram_8x256_swsr/modelsim/wave.do
11/vivado_prj/ex_fifo/ex_fifo.ip_user_files/sim_scripts/dp_ram_8x256_swsr/questa/compile.do
11/vivado_prj/ex_fifo/ex_fifo.ip_user_files/sim_scripts/dp_ram_8x256_swsr/questa/dp_ram_8x256_swsr.sh
11/vivado_prj/ex_fifo/ex_fifo.ip_user_files/sim_scripts/dp_ram_8x256_swsr/questa/dp_ram_8x256_swsr.udo
11/vivado_prj/ex_fifo/ex_fifo.ip_user_files/sim_scripts/dp_ram_8x256_swsr/questa/elaborate.do
11/vivado_prj/ex_fifo/ex_fifo.ip_user_files/sim_scripts/dp_ram_8x256_swsr/questa/file_info.txt
11/vivado_prj/ex_fifo/ex_fifo.ip_user_files/sim_scripts/dp_ram_8x256_swsr/questa/glbl.v
11/vivado_prj/ex_fifo/ex_fifo.i