文件名称:an486_design_example
介绍说明--下载内容来自于网络,使用问题请自行百度
VHDL实现SPI接口转I2c接口的源代码,可以直接调用
(系统自动生成,下载前可以参看下载内容)
下载文件列表
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/code/SPI_to_I2C.v
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/SPI_to_I2C.cr.mti
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/SPI_to_I2C.mpf
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/SPI_to_I2C.v
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/SPI_to_I2C_test.v
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/SPI_to_I2C_test.v.bak
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/transcript
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/vsim.wlf
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/wave.bmp
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/wave.do
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@i2@c_master/verilog.psm
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@i2@c_master/_primary.dat
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@i2@c_master/_primary.vhd
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_slave/verilog.psm
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_slave/_primary.dat
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_slave/_primary.vhd
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_to_@i2@c/verilog.psm
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_to_@i2@c/_primary.dat
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_to_@i2@c/_primary.vhd
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_to_@i2@c_test/verilog.psm
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_to_@i2@c_test/_primary.dat
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_to_@i2@c_test/_primary.vhd
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/divider/verilog.psm
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/divider/_primary.dat
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/divider/_primary.vhd
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/internal_oss_altufm_osc_7p3/verilog.psm
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/internal_oss_altufm_osc_7p3/_primary.dat
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/internal_oss_altufm_osc_7p3/_primary.vhd
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/_info
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.(0).cnf.cdb
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.(0).cnf.hdb
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.(1).cnf.cdb
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.(1).cnf.hdb
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.(2).cnf.cdb
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.(2).cnf.hdb
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.(3).cnf.cdb
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.(3).cnf.hdb
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.(4).cnf.cdb
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.(4).cnf.hdb
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.asm.qmsg
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.asm_labs.ddb
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.cbx.xml
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.cmp.cdb
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.cmp.hdb
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.cmp.logdb
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.cmp.rdb
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.cmp.tdb
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.cmp0.ddb
an486_design_example/AN486
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/SPI_to_I2C.cr.mti
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/SPI_to_I2C.mpf
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/SPI_to_I2C.v
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/SPI_to_I2C_test.v
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/SPI_to_I2C_test.v.bak
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/transcript
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/vsim.wlf
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/wave.bmp
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/wave.do
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@i2@c_master/verilog.psm
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@i2@c_master/_primary.dat
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@i2@c_master/_primary.vhd
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_slave/verilog.psm
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_slave/_primary.dat
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_slave/_primary.vhd
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_to_@i2@c/verilog.psm
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_to_@i2@c/_primary.dat
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_to_@i2@c/_primary.vhd
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_to_@i2@c_test/verilog.psm
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_to_@i2@c_test/_primary.dat
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_to_@i2@c_test/_primary.vhd
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/divider/verilog.psm
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/divider/_primary.dat
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/divider/_primary.vhd
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/internal_oss_altufm_osc_7p3/verilog.psm
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/internal_oss_altufm_osc_7p3/_primary.dat
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/internal_oss_altufm_osc_7p3/_primary.vhd
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/_info
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.(0).cnf.cdb
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.(0).cnf.hdb
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.(1).cnf.cdb
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.(1).cnf.hdb
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.(2).cnf.cdb
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.(2).cnf.hdb
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.(3).cnf.cdb
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.(3).cnf.hdb
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.(4).cnf.cdb
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.(4).cnf.hdb
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.asm.qmsg
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.asm_labs.ddb
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.cbx.xml
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.cmp.cdb
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.cmp.hdb
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.cmp.logdb
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.cmp.rdb
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.cmp.tdb
an486_design_example/AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.cmp0.ddb
an486_design_example/AN486
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