CDN加速镜像 | 设为首页 | 加入收藏夹
登陆 | 会员注册
当前位置： 首页 资源下载 源码下载 嵌入式/单片机编程
收藏

文件名称:Xilinx_9

  • 所属分类：
    嵌入式/单片机编程
  • 标签属性：
    [VHDL] [源码]
  • 上传时间：
    2008-10-13
  • 文件大小：
    598.88kb
  • 已下载：
    0次
  • 提 供 者：
    guo***
  • 相关连接：
    无
  • 下载说明：
    别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

Xilinx ISE

官方源代码盘第九章-Xilinx ISE official source was the ninth chapter
(系统自动生成,下载前可以参看下载内容)

下载文件列表

Xilinx_9
Xilinx_9/Example-9-1
Xilinx_9/Example-9-1/synplify_pro_prj
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn_1
Xilinx_9/Example-9-1/synplify_pro_prj/综合所需的源代码
Xilinx_9/Example-9-1/watch_sc_v5
Xilinx_9/Example-9-1/watch_sc_v5/xst
Xilinx_9/Example-9-1/watch_sc_v5/xst/work
Xilinx_9/Example-9-1/watch_sc_v5/xst/work/sub00
Xilinx_9/Example-9-1/watch_sc_v5/_ngo
Xilinx_9/Example-9-1/watch_sc_v5/_tmp_
Xilinx_9/Example-9-1/watch_sc_v5/_tmp_/coretmpdir
Xilinx_9/Example-9-1/watch_sc_v5/__projnav
Xilinx_9/Example-9-1/watch_sc_v6
Xilinx_9/Example-9-1/watch_sc_v6/xst
Xilinx_9/Example-9-1/watch_sc_v6/xst/work
Xilinx_9/Example-9-1/watch_sc_v6/xst/work/sub00
Xilinx_9/Example-9-1/watch_sc_v6/xst/work/vlg1D
Xilinx_9/Example-9-1/watch_sc_v6/xst/work/vlg1E
Xilinx_9/Example-9-1/watch_sc_v6/xst/work/vlg20
Xilinx_9/Example-9-1/watch_sc_v6/xst/work/vlg37
Xilinx_9/Example-9-1/watch_sc_v6/xst/work/vlg41
Xilinx_9/Example-9-1/watch_sc_v6/xst/work/vlg51
Xilinx_9/Example-9-1/watch_sc_v6/xst/work/vlg66
Xilinx_9/Example-9-1/watch_sc_v6/xst/work/vlg71
Xilinx_9/Example-9-1/watch_sc_v6/xst/work/vlg7B
Xilinx_9/Example-9-1/watch_sc_v6/_ngo
Xilinx_9/Example-9-1/watch_sc_v6/__projnav
Xilinx_9/Example-9-1/源文件
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/black_box.v
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/cnt60.vf
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/dcm1.v
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/decode.v
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/hex2led.v
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/outs3.vf
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/STMACH_V.v
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/stopwatch.vf
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn/STMACH_V.plg
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn/STMACH_V.srd
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn/stopwatch.edf
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn/stopwatch.fse
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn/stopwatch.ncf
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn/stopwatch.plg
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn/stopwatch.srd
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn/stopwatch.srm
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn/stopwatch.srr
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn/stopwatch.srs
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn/stopwatch.tlg
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn_1/stopwatch.edf
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn_1/stopwatch.fse
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn_1/stopwatch.ncf
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn_1/stopwatch.plg
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn_1/stopwatch.srd
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn_1/stopwatch.srm
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn_1/stopwatch.srr
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn_1/stopwatch.srs
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn_1/stopwatch.tlg
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Syn_Pro_stopwatch.prd
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Syn_Pro_stopwatch.prj
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Syn_Pro_stopwatch.sdc
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/tenths.v
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/virtex2p.v
Xilinx_9/Example-9-1/synplify_pro_prj/综合所需的源代码/black_box.v
Xilinx_9/Example-9-1/synplify_pro_prj/综合所需的源代码/cnt60.vf
Xilinx_9/Example-9-1/synplify_pro_prj/综合所需的源代码/dcm1.v
Xilinx_9/Example-9-1/synplify_pro_prj/综合所需的源代码/decode.v
Xilinx_9/Example-9-1/synplify_pro_prj/综合所需的源代码/hex2led.v
Xilinx_9/Example-9-1/synplify_pro_prj/综合所需的源代码/outs3.vf
Xilinx_9/Example-9-1/synplify_pro_prj/综合所需的源代码/STMACH_V.v
Xilinx_9/Example-9-1/synplify_pro_prj/综合所需的源代码/stopwatch.vf
Xilinx_9/Example-9-1/synplify_pro_prj/综合所需的源代码/tenths.v
Xilinx_9/Example-9-1/synplify_pro_prj/综合所需的源代码/virtex2p.v
Xilinx_9/Example-9-1/watch_sc_v5/.untf
Xilinx_9/Example-9-1/watch_sc_v5/AndNor2.sch
Xilinx_9/Example-9-1/watch_sc_v5/automake.log
Xilinx_9/Example-9-1/watch_sc_v5/bitgen.ut
Xilinx_9/Example-9-1/watch_sc_v5/cnt60.cmd_log
Xilinx_9/Example-9-1/watch_sc_v5/cnt60.jhd
Xilinx_9/Example-9-1/watch_sc_v5/cnt60.sch
Xilinx_9/Example-9-1/watch_sc_v5/cnt60.sym
Xilinx_9/Example-9-1/watch_sc_v5/cnt60.vhf
Xilinx_9/Example-9-1/watch_sc_v5/core.tpl
Xilinx_9/Example-9-1/watch_sc_v5/coregen.log
Xilinx_9/Example-9-1/watch_sc_v5/DCM1.jhd
Xilinx_9/Example-9-1/watch_sc_v5/dcm1.sym
Xilinx_9/Example-9-1/watch_sc_v5/DCM1.vhd
Xilinx_9/Example-9-1/watch_sc_v5/DCM1.xaw
Xilinx_9/Example-9-1/watch_sc_v5/DCM1_arwz.ucf
Xilinx_9/Example-9-1/watch_sc_v5/decode.jhd
Xilinx_9/Example-9-1/watch_sc_v5/decode.spl
Xilinx_9/Example-9-1/watch_sc_v5/decode

相关说明

  • 本站资源为会员上传分享交流与学习,如有侵犯您的权益,请联系我们删除.
  • 搜珍网是交换下载平台，只提供交流渠道，下载内容来自于网络，除下载问题外，其它问题请自行百度。更多...
  • 本站已设置防盗链，请勿用迅雷、QQ旋风等下载软件下载资源，下载后用WinRAR最新版进行解压.
  • 如果您发现内容无法下载，请稍后再次尝试；或换浏览器；或者到消费记录里找到下载记录反馈给我们.
  • 下载后发现下载的内容跟说明不相乎，请到消费记录里找到下载记录反馈给我们，经确认后退回积分.
  • 如下载前有疑问，可以通过点击"提供者"的名字，查看对方的联系方式，联系对方咨询.
查看所有评论

相关评论

暂无评论内容．

发表评论

*快速评论： 推荐 一般 有密码 和说明不符 不是源码或资料 文件不全 不能解压 纯粹是垃圾
*内　　容：
*验 证 码：
搜珍网 www.dssz.com