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文件名称:VerilogProject

  • 所属分类：
    VHDL-FPGA-Verilog
  • 标签属性：
    [VHDL] [源码]
  • 上传时间：
    2012-11-16
  • 文件大小：
    2.36mb
  • 已下载：
    0次
  • 提 供 者：
    刘***
  • 相关连接：
    无
  • 下载说明：
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修正介绍说明

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开发环境为Xilinx的Ise,都是一些经典的Verilog工程实例，对初学者有一定借鉴意义！-verilog project under ise environment
(系统自动生成,下载前可以参看下载内容)

下载文件列表

Verilog project/OFDM_Verilog代码/Transmitter/clock_generator/clock_generator/clk_generator_summary.html
Verilog project/OFDM_Verilog代码/Transmitter/clock_generator/clock_generator/clock_generator.ise
Verilog project/OFDM_Verilog代码/Transmitter/clock_generator/clock_generator/clock_generator.ise_ISE_Backup
Verilog project/OFDM_Verilog代码/Transmitter/clock_generator/clock_generator/clock_generator.restore
Verilog project/OFDM_Verilog代码/Transmitter/clock_generator/clock_generator/clock_generator.v
Verilog project/OFDM_Verilog代码/Transmitter/clock_generator/clock_generator/clock_generator_summary.html
Verilog project/OFDM_Verilog代码/Transmitter/clock_generator/clock_generator/DCM1.xaw
Verilog project/OFDM_Verilog代码/Transmitter/CP_ADDER/bram1I.asy
Verilog project/OFDM_Verilog代码/Transmitter/CP_ADDER/bram1i.edn
Verilog project/OFDM_Verilog代码/Transmitter/CP_ADDER/bram1i.sym
Verilog project/OFDM_Verilog代码/Transmitter/CP_ADDER/bram1i.v
Verilog project/OFDM_Verilog代码/Transmitter/CP_ADDER/bram1i.veo
Verilog project/OFDM_Verilog代码/Transmitter/CP_ADDER/bram1i.vhd
Verilog project/OFDM_Verilog代码/Transmitter/CP_ADDER/bram1i.vho
Verilog project/OFDM_Verilog代码/Transmitter/CP_ADDER/bram1i.xco
Verilog project/OFDM_Verilog代码/Transmitter/CP_ADDER/bram1r.asy
Verilog project/OFDM_Verilog代码/Transmitter/CP_ADDER/bram1r.edn
Verilog project/OFDM_Verilog代码/Transmitter/CP_ADDER/bram1r.sym
Verilog project/OFDM_Verilog代码/Transmitter/CP_ADDER/bram1r.v
Verilog project/OFDM_Verilog代码/Transmitter/CP_ADDER/bram1r.veo
Verilog project/OFDM_Verilog代码/Transmitter/CP_ADDER/bram1r.vhd
Verilog project/OFDM_Verilog代码/Transmitter/CP_ADDER/bram1r.vho
Verilog project/OFDM_Verilog代码/Transmitter/CP_ADDER/bram1r.xco
Verilog project/OFDM_Verilog代码/Transmitter/CP_ADDER/bram2i.asy
Verilog project/OFDM_Verilog代码/Transmitter/CP_ADDER/bram2i.edn
Verilog project/OFDM_Verilog代码/Transmitter/CP_ADDER/bram2i.sym
Verilog project/OFDM_Verilog代码/Transmitter/CP_ADDER/bram2i.v
Verilog project/OFDM_Verilog代码/Transmitter/CP_ADDER/bram2i.veo
Verilog project/OFDM_Verilog代码/Transmitter/CP_ADDER/bram2i.vhd
Verilog project/OFDM_Verilog代码/Transmitter/CP_ADDER/bram2i.vho
Verilog project/OFDM_Verilog代码/Transmitter/CP_ADDER/bram2i.xco
Verilog project/OFDM_Verilog代码/Transmitter/CP_ADDER/bram2r.asy
Verilog project/OFDM_Verilog代码/Transmitter/CP_ADDER/bram2r.edn
Verilog project/OFDM_Verilog代码/Transmitter/CP_ADDER/bram2r.sym
Verilog project/OFDM_Verilog代码/Transmitter/CP_ADDER/bram2r.v
Verilog project/OFDM_Verilog代码/Transmitter/CP_ADDER/bram2r.veo
Verilog project/OFDM_Verilog代码/Transmitter/CP_ADDER/bram2r.vhd
Verilog project/OFDM_Verilog代码/Transmitter/CP_ADDER/bram2r.vho
Verilog project/OFDM_Verilog代码/Transmitter/CP_ADDER/bram2r.xco
Verilog project/OFDM_Verilog代码/Transmitter/CP_ADDER/CP_ADDER.ise
Verilog project/OFDM_Verilog代码/Transmitter/CP_ADDER/CP_ADDER.ise_ISE_Backup
Verilog project/OFDM_Verilog代码/Transmitter/CP_ADDER/CP_ADDER.restore
Verilog project/OFDM_Verilog代码/Transmitter/CP_ADDER/CP_adder.v
Verilog project/OFDM_Verilog代码/Transmitter/CP_ADDER/CP_adder_summary.html
Verilog project/OFDM_Verilog代码/Transmitter/CP_ADDER/templates/coregen.xml
Verilog project/OFDM_Verilog代码/Transmitter/DATA_16QAM_MAP/DATA_16AM_MAP.ise
Verilog project/OFDM_Verilog代码/Transmitter/DATA_16QAM_MAP/DATA_16AM_MAP.ise_ISE_Backup
Verilog project/OFDM_Verilog代码/Transmitter/DATA_16QAM_MAP/DATA_16AM_MAP.restore
Verilog project/OFDM_Verilog代码/Transmitter/DATA_16QAM_MAP/DATA_16QAM_MAP.v
Verilog project/OFDM_Verilog代码/Transmitter/DATA_16QAM_MAP/DATA_16QAM_mapper_summary.html
Verilog project/OFDM_Verilog代码/Transmitter/DATA_16QAM_MAP/DATA_16QAM_MAP_summary.html
Verilog project/OFDM_Verilog代码/Transmitter/DATA_CONV_encode/conv_encoder.v
Verilog project/OFDM_Verilog代码/Transmitter/DATA_CONV_encode/DATA_CONV_encode.ise
Verilog project/OFDM_Verilog代码/Transmitter/DATA_CONV_encode/DATA_CONV_encode.ise_ISE_Backup
Verilog project/OFDM_Verilog代码/Transmitter/DATA_CONV_encode/DATA_CONV_encode.restore
Verilog project/OFDM_Verilog代码/Transmitter/DATA_CONV_encode/DATA_Conv_encode.v
Verilog project/OFDM_Verilog代码/Transmitter/DATA_CONV_encode/DATA_conv_encoder_summary.html
Verilog project/OFDM_Verilog代码/Transmitter/DATA_CONV_encode/DATA_Conv_encode_summary.html
Verilog project/OFDM_Verilog代码/Transmitter/data_interleaver/data_interleaver/count24.asy
Verilog project/OFDM_Verilog代码/Transmitter/data_interleaver/data_interleaver/count24.edn
Verilog project/OFDM_Verilog代码/Transmitter/data_interleaver/data_interleaver/count24.sym
Verilog project/OFDM_Verilog代码/Transmitter/data_interleaver/data_interleaver/count24.v
Verilog project/OFDM_Verilog代码/Transmitter/data_interleaver/data_interleaver/count24.veo
Verilog project/OFDM_Verilog代码/Transmitter/data_interleaver/data_interleaver/count24.vhd
Verilog project/OFDM_Verilog代码/Transmitter/data_interleaver/data_interleaver/count24.vho
Verilog project/OFDM_Verilog代码/Transmitter/data_interleaver/data_interleaver/count24.xco
Verilog project/OFDM_Verilog代码/Transmitter/data_interleaver/data_interleaver/data_interleaver.ise
Verilog project/OFDM_Verilog代码/Transmitter/data_interleaver/data_interleaver/data_interleaver.ise_ISE_Backup
Veril

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