搜索资源列表
adder
- 加法器,简单的加法计算器程序,用vb语言实现-Adder, a simple addition calculator program using vb language implementation
ghjk
- 十进制加法器 示范的的游侠的序号的的剑客骄傲 到家了库文件发动机阿拉斯加法律-Decimal adder demonstration of the Ranger of the serial number of the swordsman proud home of the library file engine Alaska law
Accumulator
- 计算机组成原理实验简单的加法器程序。仅供大家参考。-Computer Composition Theory Experiment a simple adder program. Only for your reference.
add
- VHDL的初学者可以参考此VHDL加法器,相信会给你带来不小的收获-VHDL beginner can refer to the VHDL adder, I believe will bring you not a small harvest
adder32
- 原理图输入法制作的32位加法器-adder32
myjiafa
- 用函数语句实现的加法器-adder-function
adder2-bingxing
- 2位加法器并行操作-2adder
adder16
- adder16 16位加法器-adder16
ADDER
- VHDL语言的带控制端口的加法器,实现加法运算。-VHDL language, with a control port of the adder to achieve addition operation.
add32
- 一个32位超前进位加法器 不一样的算法 简单实用-An 32-bit look-ahead adder not the same as the algorithm
Parallel-adder
- 并行加法器是一种数位电路,其可进行数字的加法计算。在现代的电脑中,加法器存在于算术逻辑单元(ALU)之中。 加法器可以用来表示各种数值,如:BCD、加三码,主要的加法器是以二进制作运算。-Parallel adder is a digital circuit, which can be calculated the number of addition. In the modern computer, adder exists in the arithmetic logic unit (ALU)
add_16bits
- 這是16bits加法器,利用verilog程式撰寫-adder-19bts
adder
- 加法器程式設計,這是利用verilog寫的-adder
VHDLonfir
- FIR滤波器在VHDL中使用(顺序)PROCESS声明或者是加法器和乘法器的“组件 实例”来实现-FIR filter in VHDL use (in order) PROCESS statement or the adder and the multiplier " component instance" to achieve the
ALU_6502
- 这个数据是使用cadence工具来做的8位CPU的全加法器
adder32_carry_select
- 用Hspice编写的32位超前进位加进位选择快速加法器,经验证速度达0.6ns-An adder32_carry_select nse Hspice.
adder
- 一个加法器程序,同时里面又有一个测试程序,是学习verilog HDL的好程序。-a adder program
BCD8
- BCD码十进制8位加法器,采用超前进位的方法-8-bit decimal BCD adder yards, using look-ahead approach
a
- 个人整理的关于FIR滤波器、加法器、减法器的verilog程序,供大家下载-It’s about some programs about filter,and some others I‘ll be happy if it s better for you~~~