搜索资源列表
verilog
- 基于DSP和FPGA的CCD 图像采集系统设计与实现-FPGA-based DSP and CCD image acquisition system design and implementation
FPGASDRAMverilog
- 一个基于Xilinx FPGA的DDRSDRAM的Verilog控制代码，使用的FPGA为Virtex完整源代码。-A Xilinx FPGA-based control DDRSDRAM the Verilog code for the Virtex FPGA using the full source code.
verilog-HDL
- verilog hdl使用教程，详细入微的讲解了FPGA开发的必备工具verilog HDL语言。对于新手入门有很大的帮助。-verilog hdl use of tutorials, detailed explanations of the FPGA nuanced development of the necessary tools verilog HDL language. For beginners a great help.
FPGA-Introduction
- 简单介绍Verilog HDL语言和仿真工具，主要应用领域，了解Verilog 的发展历史 -Brief introduction to Verilog HDL language and simulation tools, the main application areas to understand the historical development of Verilog
PCIbus_Verilog
- PCI总线（Slave）接口FPGA的实现代码，全部为Verilog语言源码文件，还包括测试代码，内附设计实用说明文档。-PCI Bus (Slave) interface to FPGA implementation of the code, all source code files for the Verilog language, but also test the code, included the design and practical documentation.
fpga-tutorial-of-Yuwen-Xia
- 夏宇闻老师的Verilog学习教程，很有用哦-XIA Wen teachers Verilog tutorial, very useful oh
DS18B20_ysd
- 18b20 verilog fpga ep3c10e
Verilog_A
- FPGA 用到的语言Verilog 本资料为实验开发板的实例程序代码 入门提高很好-FPGA Verilog language used for the experimental development of the information board to improve a very good example code entry
fpga-control
- fpga 对采集的数据进行控制的相关verilog语言编程代码-fpga for collection of data related to control programming code verilog
verilog--beep_ambulance
- altera FPGA学习测试例程序 蜂鸣器演示救护车声音 verilog beep_ambulance-altera FPGA test case study demonstrates the ambulance program buzzer sounds verilog beep_ambulance
86verilog
- 以FPGA 芯片为平台构建了数字信号滤波实时处理模块, 给出了 50Hz 陷波器的切比雪夫Ê 型 IIR 数字 滤波器 4 阶级联的结构, 提出了对滤波器系数量化的逼近方法, 完成了基于 FPGA 的陷波器实现, 并成功地实现了 对含有工频 50Hz 噪声干扰的心电信号的滤波处理, 通过与M at lab 计算所得到的滤波处理效果进行比较分析, 结 果表明: 基于FPGA 采用切比雪夫Ê 型 4 级级联结构的 IIR 数字滤波器的误差满足设计要求- W ith t
VHDL_Elimination-of-key-jitter
- 基于VHDL语言下的消除键抖动程序设计，很简单易懂的-Elimination of key jitter
keyboard
- 使用FPGA verilog语言编写的键盘按键消抖程序，三个按键，控制LED亮灭-Written using the FPGA verilog keyboard debounce procedure, three buttons, the control LED light off
synth_fft
- fftprocessing can complete 256 pointsFFT.-Hardware Descr iption Language(HDL)is an advanced electronic designmethod．After HDL was put into use，it has draw great attention and gained popularity．The design used Verilog HDL and Schematic for entry tools
verilog
- 数字信号的处理，是用FPGA开发板实现的，可供做数字滤波器的提供参考-Digital signal processing is implemented with FPGA development board available for reference to do the digital filter
MACtop
- 基于FPGA的以太网控制器（MAC）源码，包括发送、接收、控制、CRC、寄存器、计数器等模块-Ethernet MAC sub-layer protocol
ddr
- 基于FPGA的ddr控制器的设计与实现，verilog，ISE-FPGA-based controller design and implementation of ddr, verilog, ISE
uart_test
- Verilog 基于FPGA的直接RS232串口测试-Verilog FPGA-based test of direct RS232 serial port
controller-design-of-sdram-
- 基于FPGA对sdram控制器的设计（VERILOG语言）-FPGA-based controller design of sdram (VERILOG language)
module-i2c
- I2C MASTER CODE FOR VERILOG AND FGPA IMPLEMENTATION.I WILL SUPPLY FULL CODE IF NE-I2C MASTER CODE FOR VERILOG AND FGPA IMPLEMENTATION.I WILL SUPPLY FULL CODE IF NEEDED