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PV-inverter-(mppt-pll-pid)
- 基于DSP的单相光伏并网逆变器全部源代码，包括锁相环PLL,mppt,pid控制程序,希望对大家有帮助!-DSP single-phase photovoltaic grid-connected inverter with full source code, including the phase-locked loop PLL, mppt, pid control procedures, we hope to help!
PLL
- 飞思卡尔单片机编程，涉及到里面的PLL模块编程，能够直接调用-Freescale microcontroller programming, related to the inside of the module programming, can be called directly
LC7218-PLL-89C51
- 89C51单片机控制LC7218锁相环电路，根据预置分频系数显示频率-89C51 microcontroller to control the LC7218 PLL, display frequency according to the preset frequency coefficient
pll
- 关于PLL 一些经典的文章，大家可以参考一下！-PLL some classic article, we can refer to it!
PLL
- 30MHz-200MHz PLL锁相环，硬件电路，控制程序，原理图使用ORCAD,PCB使用POWERPCB5.0，控制程序使用KEIL C-30MHz-200MHz PLL phase-locked loop, the hardware circuit, control procedures, schematics using ORCAD, PCB use POWERPCB5.0 control program uses KEIL C
pll
- 基于 Matlab 的锁相环（PLL）模拟代码。-Basic Phase-Locked Loop simulation code in Mtalab
pll
- 单载波 BPSK QPSK调制下的PLL功能实现 实现频率相位的跟踪-Single carrier BPSK QPSK modulation the PLL frequency phase tracking
PLL
- 基于TMS320F28335的全数字锁相环的设计-The design of the digital PLL based on TMS320F28335
PLL
- 锁相环的应用，各个参数的调试及仿真实现，用于转速估算-pll simulation
PLL-setting
- FPGA中锁相环的具体设置方法，可以使系统时钟稳定-Setting method of fpga pll, it make system clock stable.
pll
- pll锁相环编程程序 可以使用 matlab 编程语言-The program can be used PLL phase locked loopThe MATLAB programming language
PLL
- PHOTOVOLTAIC INVERTER P-PHOTOVOLTAIC INVERTER PLL
pll.rar
- optimizing pll loop parameters matlab model,optimizing pll loop parameters matlab model
4-PLL.rar
- this project set PLL of 5502 DSP on 300MHZ with a 20MHZ external crystal, in this project used a function for delay micro second. this project has a command file. ,this project set PLL of 5502 DSP on 300MHZ with a 20MHZ external crystal, in this pr
5-LED-with-set-PLL-a-delay-fun
- this project toggle one LED on GPIO4 from 5502 DSP periodically (one second). PLL is set on 300MHZ.this project has cmd file and a function for delay micro second.,this project toggle one LED on GPIO4 from 5502 DSP periodically (one second). PLL is s
PLL
- PLL仿真 设计和仿真一个PLL，分析杂散和相位噪声-PLL simulation
pll
- Freescale K60 PLL时钟配置 各种PLL模式之间转换-The the Freescale K60 PLL clock configuration between the various PLL mode conversion
pll
- 专业级飞思卡尔s12锁相环pll初始化，初学者勿点哦-The professional level Freescale s12 Phase Locked Loop pll initialization
PLL
- quartus II中IP核的使用案例，在程序里边调用了PLL核进行时钟的管理。-Quartus II IP core use cases, called in the program inside the PLL core clock management.
PLL
- FPGA板上的锁存器PLL控制代码（verilog代码）-FPGA board latch the PLL control code (Verilog code)