搜索资源列表
pll.rar
- 模拟锁相环（apll）的一些simulink模型,Analog phase-locked loop (apll) some simulink model
jack
- LC72131 PLL C源程序-LC72131 PLL C source
PhaseNoise_sim
- PLL相位噪声仿真方法总结,用来说明对各个模块相位噪声仿真的方法-PLL phase noise simulation document
clock_system_of_LPC23xx
- LPC23xx系列ARM时钟源的选择、PLL的设置步骤以及注意事项等。PPT做的非常出色。-LPC23xx Series ARM clock source selection, PLL settings, as well as attention to matters such as these. PPT doing very well.
ex8_9_PLL
- FPGA入门，PLL不再是难题；本文件包提供PLL的的程序，供大家参考，请做出批评-FPGA Starter, PLL is no longer a problem this package provides procedures for the PLL, for your reference, please make a critical
FPGA-based-design-of-DPLL
- 采用VHDL设计的全数字锁相环电路设计，步骤以及一些详细过程介绍。-VHDL design using all-digital PLL circuit design, detailed process steps and some introduction.
costas_loop
- 使用改进的COSTAS环实现锁相环（PLL），应用于高动态的数字化接收系统-COSTAS Central improved to achieve phase-locked loop (PLL), used in high dynamic digital reception system
pll
- 锁相环的MATLAB/SIMULINK仿真-Phase Locked Loop
pll-SystemCAMS
- 新型的SystemC-AMS语言，这是PLL使用SystemC-AMS实现的例子-New SystemC-AMS language, This is PLL implementation using SystemC-AMS example
PLL
- 三项锁相环：利用park变换和clark变换，将三相电网电压，变换为两相旋转坐标系下的电压。同时跟踪A相电压的相位角-Three phase-locked loop: the use of park conversion and clark transformation, the three-phase voltage, transformed into two-phase rotating coordinate system voltage. While tracking the phase
dds
- 基于FPGA的DDS设计，本程序采用verilog HDL语言编写，使用DDS+Pll倍频-The DDS-based FPGA design, the procedures used verilog HDL language, the use of DDS+ Pll frequency
TEA5767_C51
- 用到飞利浦的TEA5767的收音机模块,SP3767和TEA5767完全兼容 TEA5767采用I2C或者三线接口控制,我是用的I2C,单片机用STC89C52,带1K EEPROM,可以掉电存台,1602LCD显示,这里只给了TEA5767的控制程序, TEA5767读写数据都是5个字节,其中PLL参数14位.-Philips TEA5767 use of the radio module, SP3767 and TEA5767 fully compatible with TEA
TMS320C6722
- TI提供的浮点处理器TMS320C6722的外设例程，包括dmax、emif、i2c、mcasp、pll、rti、spi等，使用了CSL库函数。-Provided by TI TMS320C6722 floating point processor peripheral routines, including dmax, emif, i2c, mcasp, pll, rti, spi, etc., using CSL library functions.
fq_div
- pll 的64倍频 锁相环技术用 实现倍频 从而达到对频率的分频-pll 64 multiplier PLL multiplier used to achieve so as to achieve the sub-band of frequencies
pll_verilog_code
- 这是一段pll verilog代码，是本人转载！-This is a period of pll verilog code, yes I reprint!
LMX2531_PLL_module
- 利用FPGA完成对锁相芯片LMX2531初始化，语言为VHDL.-this module solute the PLL chip LMX2531 event ,using FPGA with VHDL.
LPC2300
- LPC2300样例：ADC、CAN、DAC、EMC、GPIO、I2C、IAP_Program、IrDA、PLL、系统控制模块、向量中断控制器-LPC2300 Example: ADC, CAN, DAC, EMC, GPIO, I2C, IAP_Program, IrDA, PLL, system control module, Vectored Interrupt Controller
costas_PLL
- 实现科斯塔斯环，pll程序，仿真通过，matlab程序-pll
PLLfpgapaper
- 实现数字锁相环的一篇论文，FPGA实现，用于位同步。-Paper digital PLL, FPGA implementation for bit synchronization.
FPGAPLL
- FPGA做的PLL 可以使用，比软件自带的省一些资源-PLL can be used FPGA to do more than the software comes with some of the resources of the province,