搜索资源列表
CPU
- 简单的CPU设计,使用VHDL 和 quartus ii 设计的cpu(a simply cpu design, vhdl quartus ii ,dsg gs h srh rsh rsh srjh srh)
mux21a
- 二选一，用于FPGA编程初学阶段，简单例子，使用时解压即可，Quartus II 9.0 (32-Bit)的应用(Two choose one, for FPGA programming beginner stage, a simple example, the use of decompression can be, Quartus II 9 (32-Bit) applications)
DES_Core
- 基于Quartus ii 平台的DES加密算法Verilog设计和modelsim仿真(DES encryption algorithm design and Modelsim simulation based on Quartus II platform)
MakeImageData
- 用Delphi来发生彩色LED显示屏的资料。在VHDL固件里，保存这个资料作为mif样式到ROM架构。终于FPGA芯片显示静止图像在LED屏幕。(We developed Delphi application. This application generate initial data of VHDL firmware. This data has a <*.mif> style. FPGA chip using this initial data displays still
vr_comp1
- 这软件变换摄像头的资料成为串口样式资料。 摄像头型号是GC0328 。它的出口资料有并口样式。 串口资料的样式是SPI样式。(This software transforms camera data into serial style data. The camera model is GC0328. Its output data has a parallel port style. The serial data has a SPI style.)
第5章_QuartusII应用向导(原理图输入方法)1
- I hope the PDF file I shared is very useful for you.
source code
- 2.6'TFT_LCD驱动源程序，可以在quartusII平台上直接运行(2.6'TFT_LCD driver source program, you can run directly on the quartus II platform)
uart程序_quartus_verilog
- 该程序实现uart串口收发数据，按照通信数据格式，代码编写规范，实现fpga中uart通信功能。(The program realizes the UART serial transceiver data, according to the communication data format, code specification, to achieve UART communication function in fpga.)
introtutorial
- An example to learn how to use Quartus II
计组课设3
- The design of the simple model machine (micro instruction implementation)
traffic2
- 数电课程设计，交通灯，基于Quartus II编写(Digital electric course design, traffic lights)
clock_shiyan
- 数电课程设计，数字时钟，基于Quartus II设计(Digital electric course design, digital clock)
oscillo_1
- 简单数字示波器的verilog设计,涉及到时钟同步，FIFO的配置和使用，非常适合用来学习FPGA以及熟悉quartus II 软件。(digital oscilloscope design)
gray_counter
- 格雷码计数器实质包含了三个部分 格雷码转二进制、加法器、二进制转格雷码。通过quartus II 自带的Modlesim仿真验证了 能够实现二进制和格雷码之间的转换(Gray counter essence contains three parts, gray code to binary adder, binary gray code conversion. Modlesim simulation by quartus with II verified to achieve the conve
crc_write
- 基于quartus II的CRC16校验代码，并实现了Modlsim实现了仿真验证(The CRC16 check code based on Quartus II and the realization of the simulation verification by Modlsim)
ef48dc75a9a60030c622898a19b0f2d6 (1)
- 内有关于循环码的编码器的程序语言，可用quartus ii打开(There is a program language on the encoder of the loop code, which can be opened with Quartus II)
VHDL方波
- 在Quartus II 中，利用VHDL 语言产生方波，程序如下(The VHDL language produces Fang Bo)
ALU
- quartus ii 13.0 based,74181 vhdl code implementation
mimasuo
- 基于VHDL 4位电子密码锁的设计，在quartus II 上仿真通过(Design of 4 bit electronic cipher lock based on VHDL)
cup实验指导书(1).docx
- cpu开发 单片机实现简单cpu的简单功能，使用quartus ii编程(cpu kaifa danpianji shixian jiandan cpu de jiandan gongneng shiyong quartus ii biancheng)