搜索资源列表
DE2_TV
- 友晶公司DE2开发板的TV示例完整源代码 FPGA Cyclone-Friends of the crystal of TV company DE2 development board complete source code for FPGA CycloneII sample
FullAdder
- 要求在Quartus II软件，利用VHDL完成层次式电路设计，电路中的元件可以用VHDL设计也可以用库元件连线构成再封装。借助EDA工具中的综合器，适配器，时序仿真器和编程器等工具进行相应处理。输入方法不限制。适配采用Cyclone系列的EP1C6Q240C8。要求综合出RTL电路，并进行仿真输入波形设计并分析电路输出波形。要求采用层次式结构设计。-Quartus II software requires the use of VHDL complete hierarchical circui
NAT
- 乐器数字接口MIDI（Musical Instrument Digital Interface），是数字音乐的国际标准。任何电子乐器，只要能处理MIDI消息，并有合适的硬件接口，都可视为一个MIDI设备。本设计完成一个MIDI音乐播放器，该设备以MIDI技术为基础，在Altera公司Cyclone系列FPGA EP1C6Q240C8上实现数字音频合成。MIDI信号源由PC机串口配合串口MI-dssssdsfddsds
key44
- 4x4鍵盤使用語法為VHDL，基於cyclone-4 x 4 keyboard using VHDL
suoxianghuan
- 1.了解锁相环的工作原理。 2、学习使用Cyclone器件中的嵌入式锁相环。 3、掌握数字存储示波器的使用方法。 4、测试嵌入式锁相环输出信号的特性。 -1. To understand the working principle of phase-locked loop. 2, learning to use Cyclone devices in the embedded phase-locked loop. 3, the digital storage oscilloscop
irDA
- irDA的VHDL程序及开发资料,在cyclone II上完美编译-irDA of VHDL procedures and development of information compiled in cyclone II on the perfect
verilogsram
- 在FPGA中实现SRAM的测试程序代码，支持cyclone系列芯片-SRAM in the FPGA to implement the test program code to support cyclone series chips
Cyclone_II_FPGA_Minimum_System
- Cyclone II FPGA最小系统电路连接方式。包含JETAG配置和PLL配置-Minimum System Cyclone II FPGA circuit connections. Configuration and PLL configuration contains JETAG
cyc2_cii5v1_01
- This section provides information for board layout designers to successfully layout their boards for Cyclone® II devices. It contains the required PCB layout guidelines, device pin tables, and package specifications.-This section provides
music
- 乐曲硬件演奏电路设计 由顶层文件和数控分频、乐曲简谱码对应的分频预置数查表电路、8位二进制计数器（ROM的地址发生器）组成。演奏乐曲“梁祝”，乐曲可改。已经过硬件下载测试（使用芯片EP1C6Q240 Cyclone系列）-Music by the top hardware performance circuit design file and the NC frequency, music notation code number corresponding to the preset fr
Shiftregister
- A simple realisation code of a shift register written on VHDL in Quartus II for Cyclone II. The programm can store or shift the input data to left or right depending on which mode is chosen.Can be useful for the students.
0710200134
- 本文介绍了一个多功能电子钟的设计方案。该方案具有计时、整点报时、校时、校分、闹钟等多项功能。此方案基于Altera 公司的 Cyclone 芯片及Quartus II 7.2 软件。整体设计采用自顶向下的设计思想，大量使用了器件模块化操作。本文对于研究数字钟及扩大其应用，有着非常现实的意义。-This paper describes a multi-clock design. The program has the time, the whole point of time, school ho
1
- 旋风、快车、讯雷地址转变工具，可以让讯雷下载快车、旋风的文件、很好用的工具！-Tornado, Express, Thunder address change tool that allows to download Thunder Express, cyclone files, useful tool
DisasterEarlyEwarningSystem
- Disasters strike without warning. Natural calamities like flood, cyclone, earthquake or any other mishappening bring heaps of troubles on all of us. People are rendered homeless. Their properties are ruined. While many people are aware of the terribl
CLOCK-ON-ALTERA-DEV-NOARD-RONTEX
- 这是我上电子线路设计课程时自己写的数字钟设计的整个工程.网上下载安装quartus II软件后双击clock.sof打开调试.若软件说没有权限,请删除db文件夹后再试. 文件夹中附带我的实验报告,其中详细讲解了我的设计思路\软件架构\可能出现的问题等等. 调试步骤就不讲了,管脚分配请网友自行完成. 开发板 Altera Cyclone II EP2C35F672C6 软件平台 Quartus II 语言 verilogHDL-These are all the project
Altera-CycloneII
- Protel99库_ALTERA Cyclone-Library _ALTERA CycloneII Protel99
xunleiconvert
- 迅雷快车旋风地址转换器，可以转换迅雷、快车、旋风专用的地址为正常下载地址-Thunder Express Cyclones address converter, can convert Thunder, Express, a dedicated address for normal cyclone Download
bookmanagement
- 用ASP和小旋风实现的图书管理系统，功能比较齐全，而且已成功运行。-And small cyclone with ASP to achieve the library management system, function quite complete, and has been run successfully.
cyclone
- 在LINUX下使用ARM9对FPGA EP1C6Q240进行配置的例子,其它FPGA也可参考此代码进行配置.-Use the ARM9 in LINUX configuration of FPGA EP1C6Q240 example, other FPGA code can refer to this configuration.
led_3_test
- 本源码实现了基于FPGA的3寸OLED的驱动，并能在屏上实现条纹显示和棋盘格显示。所使用开发板是CYCLONE 3,上传源码是整个工程，里面有源程序文件-The source implementation of FPGA-based 3-inch OLED driver, and can be implemented on-screen display and stripes checkerboard display. Development board used is CYCLONE 3, u