搜索资源列表
IIR
- VHDL语言编写的IIR滤波器,实现IIR功能-VHDL language of the IIR filter, the realization of IIR function
FIR_TEST
- 应用matlab 软件设计了下变频器中的CIC、HB、FIR滤波器等核心模块,并将各模块融为一体从软件实现的角度完成了对系统的搭建和功能仿真。-About such key algorithms as CIC, HB, FIR of each module in down- conversion, discussion, abstraction and summarization are given in this paper. Using the MATLAB software, we des
CIC_DEC_3
- CIC抽取滤波器设计,CIC滤波器采用5阶3倍抽取。-CIC decimation filter design, CIC filter order 3 times 5 samples.
CIC_DEC_4
- CIC抽取滤波器设计,CIC滤波器采用5阶4倍抽取。-CIC decimation filter design, CIC filter order 4 times using 5 samples.
CIC_DEC_6
- CIC抽取滤波器设计,CIC滤波器采用5阶6倍抽取。-CIC decimation filter design, CIC filter stage 6 times 5 samples.
3
- 基于FPGA的高速高阶FIR滤波器设计 基于FPGA的高速高阶FIR滤波器设计-High-speed FPGA-based FIR filter design for high-end high-end high-speed FPGA-based FIR filter design
4
- 基于FPGA的FIR数字滤波器的设计与实现,基于FPGA的FIR数字滤波器的设计与实现-FPGA-based FIR digital filter design and implementation of FPGA-Based FIR Digital Filter Design and Implementation
3
- FIR数字滤波器的优化与验证 -FIR digital filter optimization and verification FIR digital filter optimization and verification
src
- DQPSK modulation with XILINX FPGA. 2 level butterworth analog filter for I & Q D/A output. -DQPSK modulation with XILINX FPGA. 2 level butterworth analog filter for I & Q D/A output.
fri
- 滤波器的设计的,用于FIR滤波器的设计和应用-The design of filters for the FIR filter design and application
ImplementLUT-baseFIRFilterwithVHDL
- 用VHDL语言实现查找表方法有限冲击响应滤波器-VHDL language used lookup table method to achieve finite impulse response filter
FIR
- 详细的介绍的通过DSP编写滤波器的过程,图形并茂,非常好的资料,希望与大家共享,共同进步,超棒的资料-Detail the preparation of the filter through the process of DSP, graphics and Mao, very good information, I hope to share with you and common progress, great information
hpiir
- FPGA文件程序,irr型低通滤波器,vhd程序 -FPGA program file, irr-type low-pass filter, vhd procedures
fir
- 利用VHDL语言,设计了一个11阶的FIR滤波器。简单易懂-The use of VHDL language, designed a 11-order FIR filter. Easy to understand. .
reload_fir
- 这是我在Xilinx公司的FPGA上实现的FIR滤波器,调用的内部核,其特色是可以用较少的资源实现该功能,而且可以实现参数重载,即从外部MCU设置FIR滤波器的参数-This is my Xilinx FPGA to achieve the FIR filter, called internal audit, its characteristics can be achieved with fewer resources to this function, and the overload p
fir_liujiao
- 利用verilog语言设计实现8路FIR滤波-Using verilog Language Design and Implementation of 8-channel FIR filter
medianfilter
- 数字图像处理中重要的滤波器,外带详细说明文档。-Digital image processing an important filter, take-away detailed descr iption of the document.
FIR
- fir filter design using vhdl codes
fpga_debounce_filter
- fpga debounce filter code in vhdl
fir-c2h
- 基于fpga的fir滤波器的设计 非常好,谢谢大家分享-fir filter design base on fpga it is very good