搜索资源列表
Sdram_Control_4Port
- 用Verilog写的SDRAM的控制器的代码,分为详细实现了对SDRAM的控制-Written using Verilog code for SDRAM controller is divided into in detail to achieve the control of SDRAM
sdram_control
- 基于FPGA对sdram控制器的设计(VERILOG语言)-sdram fpag verilog
sdram_controller
- SDRAM控制器 SDRAM控制器 SDRAM控制器-verilog
61EDA_D556
- FPGA中的SDRAM的设计,用VERILOG语言设计-fpga sdram
sdramc_controller
- sdram 控制器 用verilog语言实现 可综合-sdram controller can be integrated with the verilog language
rtl
- 基于VERILOG的SDRAM控制程序,是目前主流设计方法-Control procedures based on VERILOG of SDRAM, is the main design
sdram_hr_hw
- SDRAM 读写控制检测Verilog源代码程序。-SDRAM read and write Verilog source code control testing procedures.
sdram_control
- 基于硬件语言Verilog的一个sdram控制器的设计以及仿真-Verilog language, a hardware-based controller design and simulation sdram
SDRAM1
- 这是一个控制sdram的程序,用verilog编写的-This is a control program sdram, prepared with verilog
project1_supplemental1
- these are projects based on verilog like memory control, sdram control etc-these are projects based on verilog like memory control, sdram control etc..
sdr_test
- sdram读写测试程序,带modsim仿真文件-verilog code of reading and writing of sdram, with modsim simulation test file.
sdram_control
- FPGA 用verilog控制sdram读写-FPGA control with verilog sdram read and write
SDRAM_TEST
- 用Verilog硬件描述语言驱动SDRAM,内有完整可实现源代码,且还有现象说明-With the Verilog hardware descr iption language driven SDRAM, can be realized within the complete source code, and there is the phenomenon described
tut_DE1_sdram_verilog
- a complete tutorial on the sdram a verilog code
sdram_vhdl
- DDR(双速率)SDRAM控制器参考设计verilog代码,可以直接用的,很好的。-DDR (double rate) SDRAM controller reference design Verilog code, can be directly used, very good.
Source
- I2C 控制器的 Verilog源程序以及I2C规范说明-The I2C bus provides a simple two-wire means of communication. This protocol is used in many applications.SDRAM modules implement a serial EEPROM that supports the I2C protocol. This is used so that a micro
FPGA_Project_Files
- 基于sdram的pci设计,包含整个工程,verilog编写-The design is base on sdram, contain a whole project ,using the verilog language.
memory-controller
- 存储控制器,包括CPUside,接口,MEMORY side三个部分,使用verilog语言-This represents the "memory controller" It runs with the assumption that it is being connected to PC100 SDRAM.
FSM
- FPGA学习资料,新手入门资料,VERILOG- Micron SDRAM DDR2 Simulation model Verilog
sdram_mdl
- verilog实现SDRAM控制器,quartus工程-verilog SDRAM controller, quartus project