搜索资源列表
hammingDec
- hamming/汉明码的解码代码,在通信中常常用到汉明码-hamming/hamming code decoder code, usually used in communication Hamming Code
BCH(31_21_5)
- BCH码的编码和解码全部过程的源代码,可以自行改变参数-BCH codes of all the process of encoding and decoding of the source code, can change the parameters
PCM
- 基于FPGA的PCM编码器与解码器的设计-about fpga and pcm
FSK_modulation_and_demodulation
- 模拟数字通信通道,将离散数据利用奇偶效验码编码,FSK调制后,发送,接收端解调解码后还原-Analog-to-digital communication channel, the use of discrete data to be well-tested code parity coding, FSK modulation, the transmission, the receiving end to restore the decoded demodulation
vhdl
- 数码管现实bcd码的解码过程,0000-1001用数码管现实译码结果-Bcd nixie tube reality code
Decode
- 十六位编解码器 时分复用解复用,很好的一个程序文件-Codec 16 demultiplexing time-division multiplexing, a very good program files
RS_Verilog
- rs编解码的verilog实现源代码,从硬件实现rs的编解码-rs codec to achieve the verilog source code, from the hardware codec rs
dpsk
- 描述了DPSK的整个程序,包括编码和解码的过程,以及相绝和绝相变换等-DPSK describes the entire process, including the process of encoding and decoding, as well as the relative phase change can not and so on
H264
- h.264(verilog HDL) 这是基于流水线结构的H.264解码器源码-h.264 (verilog HDL) which is based on the pipeline structure of the H.264 decoder source code
dianhuanyuanchengkongzhi
- 电话智能遥控器主要包括电话振铃检测电路,电话自动摘机和挂机电路,DTMF信号解码电路,语音提示急电路,音频放大电路,以及控制心脏CPU电路-Telephone remote control including smart phones ringing detection circuit, telephone and hang up automatically pick circuit, DTMF signal decoding circuit, urgent voice circuits, au
H.264
- H.264视频编解码程序,此程序已经过测试能够运行-H.264
RSandfpgadesign
- 详细介绍了RS编解码背景以及原理,同时给出了FPGA实现方案-Described in detail the background of RS codecs as well as the principles of the FPGA at the same time give the realization of the program
MQdecoder
- Verilog HDL 实现的JPEG200的MQ解码-JPEG2000 MQ DECODER BASED ON FPGA, Verilog HDL
ddr2_hamdec64
- VHDL实现的64bit海明码解码模块。 可适用于 Xilinx FPGA, Altera FPGA。-VHDL Implement 64bit Hamming Code (decode)
ami
- ami编解码程序,用VHDL语言编写的,仅供参考-AMI encode decode
ADPCM_audio_codec
- ADPCM语音编解码电路设计及FPGA实现。利用FPGA进行ADPCM编码与解码。-ADPCM voice codec circuit design and FPGA realization. FPGA for use ADPCM encoding and decoding.
shift
- E1接收部分主要功能是实现从输入的差分线路数据中恢复出2.048M线路时钟并将数据解码输出。包括解码和线路时钟恢复两模块。-E1 to receive some of the major functions of the difference from the input data lines to recover a clock and data lines 2.048M decoder output. Including decoding and clock recovery circuit
CCD
- 对ccd图像进行解码采集,并通过VGA输出-Ccd image decoding of the collection, and through the VGA output
huffman
- MP3播放器中的基于霍夫曼(huffman)解码的vhdl语言描述-MP3 player based on the Hoffmann (huffman) decoding descr iption language vhdl
mp3
- MP3解码器的VHDL源代码 ,很实用的,设计时可以参考 ,很罕见的完整MP3 decoder源码 -VHDL code for MP3 decoder