搜索资源列表
CPU
- 哈尔滨工业大学，计算机专业，计算机设计与实践课程，CPU设计-Harbin Institute of Technology, computer professional, computer design and practical courses, CPU design
cpu-risc
- wb_switch，cpu设计，精简指令cup设计-wb_switch，opencore，risc cpu design。
CPU
- 东南大学VHDL课程CPU设计 Verilog语言-Southeast University, CPU design Verilog language VHDL course
CPU
- 16位单周期CPU设计 重庆大学 计算机组成原理项目-16 single-cycle CPU design Chongqing University of Computer Composition Principle Project
16-CISC-CPU-design
- 16位精简指令集的CPU设计，有完整的步骤和原程序可供学习-16-bit RISC CPU design, complete steps and the original program for learning
cpu
- 8位实验CPU设计利用设计好的指令系统，编写汇编代码，以便测试所有设计的指令及指令涉及的相关功能。设计好测试用的汇编代码后，然后利用Quartus II软件附带的DebugController,编写汇编编译规则。接着，利用DebugController软件把汇编编译之后的二进制代码置入到所采用的存储器中，并对设计好的8位CPU进行测试。-Eight experiments designed CPU design using the instruction set, write assembly
MIPS-and-CPU-design-and-simulation
- 兼容MIPS指令集的CPU设计与仿真 处理器架构为多周期，指令用32为字长（取指占一个周期），4k的存储器（指令存储器和数据存储器分开），IO与存储器统一编制，能支持20条指令以上-MIPS instruction set compatible CPU design and simulation
cpu
- 16位实验CPU设计——设计16位的ALU，实现9种运算：逻辑运算（与、或、非、异或）4种、算术运算（加、减、自加、自减）4种以及传送操作1种；-16 Experimental CPU design
CPU
- 4位精简指令集的cpu设计，是数字电路与逻辑的课程设计，对于学习微处理器和数字电路的同学还是很有帮助的-4 RISC cpu design, digital circuit and logic of curriculum design, microprocessors and digital circuits for learning or helpful for students
CPU
- 经典的CPU设计，内部有详细的资料和设计方案，与PCI8位单片机指令兼容-Classic CPU design, detailed information and internal design, compatible with PCI8 bit microcontroller instruction
cpu
- 简单的8位CPU设计，并具有5级流水和各冲突检测及相关处理-Simple 8-bit CPU design, and each has five water and conflict detection and related treatment
multi-CPU
- 多时钟CPU设计，spartan 3e板上试验通过，支持部分mips指令，内含示例mips代码及二进制文件-Multiple CPU clock design, spartan 3e board test passed, support some mips instruction, containing sample code and binary files mips
single-CPU
- 单时钟CPU设计，spartan 3e板上试验通过，支持部分mips指令，内含示例mips代码及二进制文件-Single CPU clock design, spartan 3e board test passed, support some mips instruction, containing sample code and binary files mips
88RISC-CPU
- cpu设计能在quartus上运行 用verilog语言-a cpu program use verilog on quartus
CPU
- 简易CPU设计 利用VHDL编写。包含一个可以用于检验的LPM-RAM-DQ-CPU-design VHDL
cpu-design
- 采用VHDL实现的CPU设计代码，工程中包含测试波形。包含CPU设计文档，如指令格式设计和各功能模块说明和指令测试序列，能下载到实验台上直接运行。-CPU design is realized by VHDL Language, the project contains the test waveform. Contains the CPU design documents, such as directives format, instructions for each function mo
cpu
- 基于VHDL的简易CPU设计，可以实现加、减、乘三种运算，模拟CPU的运算过程通过指令实现运算-Simple CPU design based on VHDL, three operation can realize add, subtract, multiply, simulation of the CPU operation process operation was achieved by instruction
cpu-7-verilog
- 多周期cpu设计asadsdddasd-multi cpu design
8bit-cpu
- VHDL由简单存储器，计数器等搭建最终实现8位的cpu设计-VHDL realization 8 of cpu design
cpu
- CPU设计,本科大作业，主要是CPU的工作原理及与打印机相结合-CPU design