搜索资源列表
lcd-code
- 比较完整的LCD接口代码,verilog编写,分为6800和8080两种CPU接口,且有完整的仿真程序-Relatively complete LCD interface code, verilog prepared 6800 and 8080 is divided into two types of CPU interfaces, and there is a complete simulation program
FPGA_FIFO
- 使用Verilog编写的同步FIFO,可通过设置程序中的DEPTH设置FIFO的深度,FIFO_WRITE_CLOCK上升沿向FIFO中写入数据, FIFO_READ_CLOCK上升沿读取数据。本程序对FIFO上层操作简单实用。-Prepared by the use of Verilog synchronous FIFO, through the setup program in the FIFO depth DEPTH settings, FIFO_WRITE_CLOCK rising
ref-sdr-sdram-verilog
- SDRAM的vegilog代码,做一个SDRAM的封装成为SRAM一样进行操作。一个顶层文件下由三个模块-SDRAM
FIFO
- 异步FIFO的实现,可综合,可验证] keywords:almost_full,full,almost_empty,empty-The realization of asynchronous FIFO can be comprehensive, verifiable] keywords: almost_full, full, almost_empty, empty
FIFO
- 通用异步FIFO设计的verilog代码,来自于opencore-Universal Asynchronous FIFO Verilog design code, from opencore
FIFO1
- FIFO存储电路的设计与实现,用verilog实现fifo的参考设计-FIFO memory circuit design and realization of the realization of fifo with Verilog reference design
asyn_fifo
- verilog编写的异步fifo源代码,asyn_fifo.v为顶层,调用其他四个文件-asynchronous fifo prepared Verilog source code, asyn_fifo.v for top-level, call the other four documents
FIFO
- 用VERILOG写的FIFO程序,可以直接引用经本人测试-VERILOG written using FIFO procedures, can be directly invoked by the I test
fifo_src
- verilog语言实现,利用BlockRAM实现FIFO。-Verilog language, the use of BlockRAM achieve FIFO.
FIFO
- 512×8bid的FIFO 含工程文件,基于QUARTUs-512 × 8bid the FIFO with the project document, based on the QUARTUsII
fifo8
- FIFO 源程序,verilog HDL实现,自己验证过,没问题-FIFO source, verilog HDL to achieve their own verified, no problem
FIFO
- 利用Verilog实现了一个FIFO,包含几个模块文件,适合初学Verilog的朋友,含测试代码。-Verilog achieved using a FIFO, a document contains several modules, suitable for novice Verilog friends, including test code.
async_fifo
- verilog HDL写的异步fifo代码及测试平台,直接可用,可生成RTL代码-asynchronous fifo write verilog HDL code and test platform, directly available, can generate RTL code for
sfifo
- verilog编写的同步FIFO,功能仿真完全正确,大家可以参考下。-verilog write synchronization FIFO, functional simulation completely correct, we can refer to the next.
AsynFIFO
- Verilog 代码 异步FIFO,可综合,综合效率高,cumming的经典方法。-Verilog code for asynchronous FIFO, Cumming s the classic method.
fifo
- 使用verilog实现FIFO,包含所有工程文件。-Verilog implementation using FIFO, includes all project files.
FIFO
- FIFO的设计,用Verilog HDL语言编写-The design of FIFO,using Verilog HDL program language
FIFO
- Verilog代码,实现FIFO先入先出存储-FIFO CODE,VERILOG
FIFO
- 用verilog编写FIFO,并编写了相应的测试向量-Write FIFO Verilog
fifo
- 同步fifo的verilog代码,很好的资料,值得学习-Synchronous fifo verilog code, very good information, it is worth learning