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codestream
- 设计一个模块，从一个窜行数据流里检测出码流“11100”，这个模块包括reset,clk,datain及输出端pmatch-design a module from a trip data flow channeling Lane detected bitstream "11100", this module includes reset, clk, datain and output pmatch
dvbmpeg2analyser
- 这是本人参与实验室项目编写的实现dvb-mpeg2码流解复用中和码流相关的源代码，用c实现，dsp是ti的5416，中间用到了，计时、中断、时钟锁存寄存器设置，对于学习dsp编程很有帮助-This is my participation in the project prepared by the laboratory to achieve DVB-mpeg2 stream demultiplexing and in bitstream relevant source code, using c
dvbmpeg2work
- 这也是本人参与实验室项目编写的实现dvb-mpeg2码流解复用中和码流相关的源代码，用c实现，这部分是和mcu配合的那一部分工作程序，绝对原创-This is my participation in the project prepared by the laboratory to achieve DVB-mpeg2 stream demultiplexing and in bitstream relevant source code, using c realized, and this is
src_mp3
- The program was written with some object-orientation in mind, which means that all functions that operate on a certain structure, has the structure s name as prefix in the function name, for example \"Bitstream_get\" which gets bits from a bitstream
miniuart2
- 用ＶＨＤＬ在CPLD/FPGA上实现与PC机的RS232通信-This UART (Universal Asynchronous Receiver Transmitter) is designed to make an interface between a RS232 line and a wishbone bus, or a microcontroller, or an IP core. It works fine connected to the serial port of a
virtex5
- Virtex® -5 devices are configured by loading application-specific configuration data—the bitstream—into internal memory. Because Xilinx FPGA configuration memory is volatile, it must be configured each time it is powered-up. The bitstream is l
WATERMARKING_FPGA_BITSTREAM_FOR_IP_PROTECTION
- WATERMARKING FPGA BITSTREAM FOR IP PROTECTION
FPGA-Design-Security-Solution
- This document provides a solution to prevent the FPGA designs from being copied. It allows the FPGA design to remain secure even if the configuration bitstream is captured
sigmaDeltaMM
- Sigma Delta Domain Processing. Bitstream processing.-Sigma Delta Domain Processing. Bitstream processing.
MP3
- 基于STA013的SD卡的MP3开发，以比特流的方式访问的。能够访问根目录下的文件,不支持子目录,不支持长文件名。-Based on the development STA013 MP3 SD card, by way of bitstream access. Able to access the root directory of the file, does not support the subdirectory does not support long file names.
DE2_SD_Card_Audio
- 使用Quartus Ⅱ与 NIOS Ⅱ IDE。 功能要求：（可实现某几项或全部） 1. 支持SD卡文件读取； 2. 支持WAV或MP3或其他格式音频，如为压缩格式则需解压缩； 3. 歌曲名称LCD显示； 4. 支持“播放/暂停”控制功能； 5. 支持“前一首”功能； 6. 支持“下一首”功能； 7. 支持LED灯显示音量功能； 8. 支持复位功能； 9. 支持硬启动，FPGA码流文件和软件二进制文件写入ROM，从ROM启动； 10. 支持总歌曲数和第
pulseoximiter1
- 根据血液对光的吸收程度，通过感光器来收集数据，来测试心跳。 TSL235 感光器，放在手指下面，手指上面用光照，从而收集数据。需要配合配件TSL235 感光器，电路板，电阻。-You are going to interface a TSL235 to the FPGA. The TSL235 is a light-to-frequency converter whose output digital bitstream frequency is directly proportional
USRP-PID-Controller-clean
- PID feedback controller project for USRP1 boards (FPGA with a convenient analog front manufactured by ettus research). Implements a bitstream as well as python-based user interface.
OpenBTS-USRP1
- 用于OpenBTS USRP1 Cyclone FPGA比特流的Altera Quartus项目-Altera Quartus Project for OpenBTS USRP1 Cyclone FPGA bitstream