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FMPARTERC
- 采用C语言来编辑分频 测控 计数和储存。和硬件相匹配，用单片机来实现的FM调制器-using C language editing monitoring frequency count and storage. Hardware and matched to achieve MCU FM modulator
wavelet
- A new cable fault location method based on wavelet reconstruction is proposed. In this method the difference between the currents of faulty phase and sound phase under the high voltage pulse excitation is used as the measured signal and is de
18a
- 匹配滤波器设计，VERILOG实现的，比较好的哦-Matched filter design, VERILOG implementation, and better oh
NXP-mf
- NXP RC531 PN512 DS 官方英文版 Directly Matched Antenna Design-RC531 PN512 datasheet Directly Matched Antenna Design
twi
- C语言实现的基于AVR 8位单片机的TWI通讯！ 通过中断服务程序中的状态机，与TWI硬件状态机相配合，实现快速准确的数据交换！-C language based on the AVR 8-bit MCU s TWI communication! Through the interrupt service routine of the state machine, with the TWI hardware state machine matched the achievement of r
VHDL_DMF
- Vhdl实现扩频通信匹配滤波器，书上打下来的,打了好久.-VHDL realization of spread spectrum communication matched filter, books, playing down, playing for a long time.
FREQSYN
- 使用Verilog语言编写的使用SPI总线设置频率LM2346,可通过设置其R寄存器对其输出频率进行设置（需相应的射频电路相配合）。-The use of Verilog language use SPI bus frequency settings LM2346, can be by setting up its R register set of its output frequency (to be matched by corresponding RF circuitry).
Micore_Reader_IC_Family_Directly_Matched_Antenna_
- Micore Reader IC Family Directly Matched Antenna Design-Micore Reader IC Family Directly Matched Antenna Design
MatchFilter
- VHDL语言实现8路并行输入，8路并行输出，直接序列扩频接收机的高速匹配滤波。 -VHDL language to achieve 8-channel parallel input, 8-channel parallel output, high-speed direct-sequence spread spectrum matched filter receiver.
lvboqi
- 探讨用于直接序列扩频的数字匹配滤波器(DM )的逻辑结构和有关参敷的选取问题； 讨论了采用并行处理技术和快速算法的可行性，分析了量化比特数、取样间隔以及A／D变换器固有的 软限幅鼓应对系统性能的影响；为有所比较，还提到了早期的柱性重合D^ 。在给出部分理论分析和计 算机模拟结果之后归纳了几条主要结论，这叶在目前国内条件下设计DⅦ 特别具有参考价值。-Explore for direct sequence spread spectrum digital matched filter (
PN_code_capture_and_tracing
- 一个完整的pn码捕获与跟踪的VHDL源码,并行匹配滤波器捕获,锁相环跟踪.-A complete pn Code Acquisition and Tracking of the VHDL source code, parallel matched filter to capture, phase-locked loop tracking.
2046matchedfilter
- 2046点匹配滤波器，附带C/A码生成模块一个-2046 points, matched filter, with C/A code generation module 1
dmfilter
- gps接收机伪码捕获时采用的匹配滤波器，能完成接收码的捕获。-gps receiver pseudo-code used to capture the matched filter, receiving yards to complete the capture.
Care_and_Feeding_of_the_one_Bit_Digital_to_Analog_
- The one bit digital to analog converter (DAC) is a magical circuit that accomplishes D/A conversion without using any analog components. This a neat trick. The matched resistors required by conventional current summing DACs become more and more d
Space-Time-Adaptive
- 米国人写的先进雷达信号处理技术论文，空时二维处理技术在机载雷达中的应用文献。-This research develops a space-time adaptive processing (STAP) radar model for side-looking (SL) arrays with platform maneuver incorporation, and examines ma- neuver effects on Matched Filter (MF) performanc
QQPSSK_SimullP
- QPSK的Matlab/Simulink的调制解调仿真系统，给出接收信号眼图及系系统仿真误码率，包含载波恢复，匹配滤波，定时恢复等重要模块，帮助理解QPSK的系统 -QPSK modulation and demodulation of Matlab/Simulink simulation system, given the received signal eye diagram and other system simulation error rate, including carrie
LCD1602
- 基于FPGA EPM1270芯片设置的LCD1602液晶显示，已通过测试，显示完全正常，引脚已配好，下载直接使用-Based on the FPGA EPM1270 chip set LCD1602 liquid crystal display, has passed the test, showed completely normal, pins have been matched, downloaded directly use
I2S_Controller
- 与DE2相配套的LCM液晶显示屏的程序源代码-Matched with DE2 LCM LCD source code
TIMER
- 6. 定时器程序设计与电路仿真 LPC2138微控制器具有两个32位定时器，分别具有4路捕获收入，4路匹配比较输出，定时器是增量计数的，但溢出时并不会使中断标志置位，而只能通过比较匹配或捕获输入产生中断标志。 定义LED的输出端口，设置所有的引脚连接，使用IO0DIR寄存器定义LED控制口的输出，初始化定时器0，设置定时器0的分频、比较值。等待定时时间到，清除中断标志，通过IO0SET、IO0CLR寄存器控制LED的亮灭。 -6 Timer program design and ci
matched-filters
- DSP matched filter notes.