搜索资源列表
Uboot
- uboot源码，适合于MIPS平台。可裁减和定制。-uboot
Project4
- This zipfile is composed of a bunch of MIPS codes that might be helpful to some people who are developing CPU
R4400_Uman_book_Ed2
- MIPS R4400 用户手册，指令集介绍-The R4000 processor provides complete application software compatibility with the MIPS R2000, R3000, and R6000 processors. Although the MIPS processor architecture has evolved in response to a compromise between software a
61EDA_B133
- "see mips run"是一本非常经典的学习mips结构的资料，最新中文版。-" see mips run" is a very classic study mips structure of information and the latest Chinese version.
MIPS_Assembly_Language_Programming
- 介绍mips汇编的基本操作,主要是寄存器的应用，syscall等-Introduction mips compilation of basic operations, primarily register the application, syscall, etc.
dcchd_SMP8634_2.8.5.0_black_GCC4.mips
- 用于sigma8634开发的dcchd包，版本为： dcchd_SMP8634_2.8.5.0_black_GCC4.mips-The dcchd for sigma8634 development, version : dcchd_SMP8634_2.8.5.0_black_GCC4.mips
mlite.tar
- 很强大的mips处理器，用verilog实现的-A very strong mips processor implemented using verilog
m1_core.tar
- 一个小巧的mips处理器，verilog写的，大家可以-A small mips processor, verilog written, we can see
singlecycleMIPS-lite
- mips processor——32bit-mips processor- 32bit
countdown
- Cronometer Countdown Wince MIPS Au1200 tested ok.
MIPS
- Simple MIPS structure
CU
- mips指令控制器。fpga上板验证实现。为cpu课设重要模块-mips instruction controller.
r2000project_pipeline
- verilog mips pipelie perpect
mips789_latest.tar
- ehatever tar.gz mips
VxWorksBSP
- vxworks的bsp包，针对很多核包括68K，ppc，960，mips，x86-the bsp package ofvxworks
MIPS
- 做一个类似于8086的单片机，通过使用MIPS的开发方法-Make a similar 8086 MCU development approach through the use of MIPS
microprocessor
- 一个微处理器的Verilog代码，根据英文书籍《数字设计与架构》中的例子而写，能够运行MIPS指令，能正确执行跳转指令。通过modelsim仿真，含测试代码。-Verilog code for a microprocessor, according to the English book " Digital Design and Architecture" was written in the example, to run MIPS instructions to jump
MIPS-C
- 北京航空航天大学，计算机组成原理大作业，设计MIP-c处理器-Beijing University of Aeronautics and Astronautics, great work computer organization, design MIP-c processor
mrua_SMP8634_2.8.2.0_dev.mips
- Type make to see available build targets. -Type make to see available build targets.
CPUsourcecode
- 本设计实现了一个具有标准的32位5级流水线架构的MIPS指令兼容CPU系统。具备常用的五十余条指令，解决了大部分数据相关，结构相关，乘除法的流水化处理等问题，并实现了可屏蔽的中断网络。-This design implements a standard 32-bit 5-stage pipeline architecture of MIPS instruction compatible CPU system. Instructions with more than 50 commonly use