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SR_Latch
- RS_latch using vhdl, When using static gates as building blocks, the most fundamental latch is the simple SR latch, where S and R stand for set and reset. It can be constructed from a pair of cross-coupled NOR (Not OR) logic gates. The stored bit i
lift.vhd
- 用VHDL实现了电梯的模拟程序,实现了自动判断楼层,然后根据客户需求和楼层最近原则,实现自动判断上下行,还有报警,强制开门等功能-Achieved using VHDL elevator simulation program, to determine the realization of an automatic floor, and then based on the principle of demand and the floor recently, automatically dete
count64
- 将5MHz时钟信号分频后得到1.6/3.2秒可选的同步信号,还可接外接同步信号对其进行强制同步-To 5MHz frequency clock signal 1.6/3.2 seconds after the optional sync signal, external sync signal can then be forced synchronization