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resolutionquartusII
- 用verilog编写的分辨率提高的源代码 采用双线性插值-Written resolution with the verilog source code to improve the use of bilinear interpolation
scaler
- 针对视频数据的ZOOM IN/OUT模块， 插值算法为双线性或最邻近可选。-For video data ZOOM IN/OUT module, Interpolation algorithm for bilinear or nearest neighbor optional.
video_stream_scaler
- 该模块能对视频分辨实时缩放，采用最近邻域和双线性差值算法。该模块可以实时配置输入输出的分辨率、缩放因子，缩放算法类型等参数，也可在编译时采用默认配置。-The Video Stream Scaler (streamScaler) performs resizing of video streams in a low latency manner, resizing with either bilinear or nearest-neighbor modes.The core offers run
Tate_Bilinear_Pairing_latest.tar
- The Tate Bilinear Pairing core is for calculating Tate bilinear pairing especially on super-singular elliptic curve in affine coordinates defined over a Galois field , whose irreducible polynomial is . (For improving security, an irreducible po
tiny_tate_bilinear_pairing_latest.tar
- Tiny Tate Bilinear Pairing core is for calculating a special type of Tate bilinear pairing called reduced pairing.-Tiny Tate Bilinear Pairing core is for calculating a special type of Tate bilinear pairing called reduced pairing.
project_11_first_d1_HDMI
- 本代码将TW2867第一通道输出解复用以后进行BT.656格式的解析，然后将奇偶场合并为一帧存入DDR2，读取的时候使用双线性插值算法，将原始的720 x576的分辨率放大到800x600，然后在HDMI口输出。-This code will TW2867 first channel output demultiplexing after parsing BT.656 format, then the parity occasions and as a frame stored in DDR2,