搜索资源列表
an357
- SIngle event upset is very important when designing hardware . One of the altera s methodology is uploaded here
Timing_Analysis
- 时序分析,实用教程,altera 13.1软件,时序教程,通俗易懂-timing design
SOPC-Nios2-and-LCD-interface
- Altera SOPC Builder提供了Nios Ⅱ处理器及一些常用外设接口,但并没有提供 12864液晶模块的接口及驱动。利用SOPC Builder中元件编辑器Create New Component, 通过自定义逻辑的方法在SOPC设计中添加自己开发的液晶显示模块IP核,并集成到系统, 实现了嵌入式NiosⅡ软核处理器与液晶显示模块的接口设计,并编写了驱动程序。可以和 系统自带的接口组件一样,开发者利用该开发组件,不必了解液晶屏原理就可以使用标准C 函数操作组件进行
EP4CE6
- EP4CE6核心板原理图,ALTERA主流FPGA CYCLONE IV开发板-EP4CE6 core board schematics, ALTERA FPGA CYCLONE IV mainstream development board
multi-functional-smart-car-system--
- 本设计的多功能智能小车系统是以 Altera 公司 Cyclone 系列的 EP1C3T144 为 主控芯片的小车系统。该小车能够实现无线遥控,自动避障,自动循迹的功能。 可以在人类无法进入或生存的环境中完成任务,比如有毒环境、潮湿环境、爆破 环境。整个小车系统以遥控为基础,通过对外围电路的扩展实现更多的功能来完 成不同的任务。在人们能够观察到的环境下可以使用无线遥控控制小车的运行。 通过红外循迹的方法可以让小车按照预先所规定的轨道行进,这可以应用到无人 驾驶上。当小车遇
modelsim-with-FPGA
- 使用modelsim对基于niosII处理器的FPGA开发系统进行软硬件联合仿真的方法。个人经验总结,在Altera QII 15.1环境下描述。希望能帮到正在做类似开发的工程师。-FPGA development system for use modelsim niosII processor-based hardware and software co-simulation approach. Personal Experience, at Altera QII 15.1 descr ipt
Altera-SOPCIPcore
- sopc 开发,用户自定义指令,教你学习sopc,绝对有用-SOPC development, user custom instruction, teach you to learn SOPC, absolutely useful!!
master_sc
- altera quartus II version 15.0 master
emi
- altera external memory interface
mnl_avalon_spec
- Avalon-ST manual for FFT mega IP-core altera.-Avalon-ST manual for FFT mega IP-core altera.
Tutorial-quartes
- This tutorial is intended to familiarize you with the Altera environment and introduce the hardware descr iption languages VHDL and Verilog.
DSP-with-FPGAs
- Field-programmable gate arrays (FPGAs) are on the verge of revolutionizing digital signal processing in the manner that programmable digital signal processors (PDSPs) did nearly two decades ago. Many front-end digital signal processing (DSP) algo
DB4CE15
- Altera公司出品的FPGA IV cyclone DB4CE15核心板的电路原理图 -Altera' s FPGA IV cyclone DB4CE15 produced core plate circuit schematics
SOPCIINIOSII-guiding-book
- SOPCIINIOSII实验指导书(第二版)和 实验操作手册,以ALTERA公司的NIOSII IP核为中心,详尽的说明NIOSII的SOPC设计,适用于SOPC-NIOSII EDA/SOPC实验开发平台的系列产品-SOPCIINIOSII experimental guide book (second edition) and the experimental operation manual to ALTERA company NIOSII IP core-centric, detaile
datasheet-cyclone2
- Altera Cyclone2 datasheet
part1FSM
- Verilog implementation of a Finite state machine. Part1 of lab 7 altera de2115 lab. -Verilog implementation of a Finite state machine. Part1 of lab 7 altera de2115 lab.
Lab_source_files
- LAB SOURCE FILES - ALTERA DE1 SOC
C5_SOC_DEVKIT_E
- altera Cyclone V SOC开发板原理图-schematic of altera Cyclone V SOC Demo
SD_MEMORY
- ex SD controller to DE2-70 altera
ug_cordic
- cordic算法文档,适用于altera的FPGA-cordic docment