搜索资源列表
ram_sp_sr_sw
- ROM using file.suite in design a simple CPU
i2c_verilog
- verilog i2c 控制源代码，包括读写控制-verilog i2c source code control
cordic
- its all about cordicits all about cordic its all about cordicits all about cordic
uart
- 异步串行接口设计 vhdl设计 fpga下载模拟-this is a vhdl programm
CPU
- GOOD PERFORMANCE CPU
dct_verilog
- Implementation of one dimensional Discrete cosine transform using verilog for FPGA implementation
codes
- verilog code for traffic light controller and test bench for verification purpose
dds_verilog
- 学习dds的FPGA程序。对学习fpga的朋友是很好的帮助-Learning ddsFPGA program. Of the learning fpga friend is a good help
TFT_LCD_Verilog
- 已经在FPGA上可以点亮TFT LCD 7寸1024*600的液晶显示模组。是自动更换画面！-Has been in FPGA can lighten TFT LCD 7 "1024* 600 LCD display module. Is automatically change picture!
filter
- verilog—FIR滤波器程序，可移植性强，可以借助FDAtool设计滤波器系数，写到本程序里即可-verilog-FIR filter process, portability, and can make use of FDAtool design filter coefficients, the program can be written to
timegenetator
- 显示控制器时序产生代码，用于产生水平与垂直方向的同步信号-the timing generator to generate the vertical and horizontical sync signal
fpga
- 投币电路设计，投入1元，0.5元不等，出票，找币-Coin circuit design, put one yuan and 0.5 yuan per ticket, looking for money
STM32_FPGA(FSMC)
- STM32+ARM FMSC 学习的重要资料找了很久的哦-STM32+ARM FMSC学习的重要资料
alu
- this the vhdl code for the arithmetic logic unit.enjoy! -this is the vhdl code for the arithmetic logic unit.enjoy!
fpaddmisc-(1)
- VERILOG CODE FOR FLOating point adder
ULTRASONIC
- Ultrasonic quatus Input: Echo Output: Trig,D[15:0]
74LS148
- simplex a very important algorithm.We should never leave it
cny24
- 24进制加法计数器适用于vhdl和quartus-24 binary adder vhdl counter applied and quartus
VGA
- 非常有用的vga代码，亲测可行VGA verilog
Demonstrations
- DE0 开发板的用户手册（EP3C16F484）实例 verilog-DE0 （EP3C16F484）verilog example