搜索资源列表
stratix2_handbook
- 华为PCB设计规范,主要涉及布局,布线,仿真,还有工艺要求-Huawei PCB design specifications, mainly related to the layout, routing, simulation, as well as the technical requirements
stratix3_handbook
- Altera 公司生产的FPGA系列中的高端产品stratix三代用户手册这个也能从Altera官方网站上下载。-Altera' s FPGA series production of high-end products stratix three generations of user manuals that are downloaded from the Altera website.
altera.source
- 本工程用来配置Altea 系列FPGA芯片管教，可以配置stratix II 系列芯片。-This design allows for configuration from multiple pages with either the Stratix PGM pins (remote/local) or the Dipswitch (MPGM pins)as the page select source(non-remote/local). It can configure stratix II
DE3_User_manual
- ALtera公司的ED3开发板，用户手册，The DE3 board has plenty of features that allow users to implement a wide range of designed circuits.-The DE3 board has plenty of features that allow users to implement a wide range of designed circuits.The Stratix® III devic
StratixII
- Protel99库 ALTERA Stratix-Library ALTERA StratixII Protel99
High-Speed-FFT
- 优秀硕士论文，课题采用现场可编程门阵列((FPGA)，设计实现了一种超高速FFT处理器。目前，使用FPGA实现FFT多采用基2和基4结构，随着FPGA规模的不断扩大，使采用更高基数实现FFT变换成为可能。本课题就是采用Alter的Stratix II芯片完成了基16-FFT处理器的设计。在设计实现过程中，以基2-FFT搭建基16-FFT的运算核，合理安排时序，解决了碟形运算、数据传输和存储操作协调一致的问题。由于采用流水线工作方式，使整个系统的数据交换和处理速度得以很大提高。本设计实现了4096
paper-based-on--radar
- 本文基于某制导雷达信号处理机优化改造工程，介绍了该雷达信号处理机的 接收相干处理(CORP)、动目标显示(MTI)的原理、硬件平台、软件设计、调试以及 优化设计方法。文章首先回顾了该信号处理机相关的信号处理方法，包括数字稳 定校正技术(DS功、参差周期滤波、多次相消器的动目标显示等方法的工作原理和 实现方式，并结合项目进行计算机仿真。其次介绍了信号处理机的组成结构，优 化设计思路，主要功能分配。最后重点讨论了信号处理机的各个模块的工程实现 方法以及数字信号处理
stratix_pci_kit-v1.0
- altera PCI总线接口参考设计源代码。使用PCI编译器中的mt64兆核函数实现PCI总线接口-altera PCI bus interface reference design source code. Using the PCI Compiler mt64 trillion nuclear functions for PCI bus interface
Altera-datasheet
- altera data sheet for stratix-altera data sheet for stratixII
video_systems.tar
- H264 decoder on Stratix VI-H264 decoder
image-processing
- 图像处理方面，使用Altera公司的stratix系列的FPGA对图像进行高通滤波和高斯滤波-Image processing, Altera Corporation stratix series FPGA high-pass filter and Gaussian filter image
fpga2dsp
- Altera Stratix II FPGA与TS201 DSP通过链路口通信的程序-Altera Stratix II FPGA and TS201 DSP through a chain junction communication procedures
bus1
- DSP TS201总线通信程序，与Altera Stratix II FPGA-DSP TS201 bus communication procedures, and the Altera Stratix II FPGA
aib-01017-soc-fpga-overview
- Altera SOC platform overview for Stratix-V, ArriaV FPGA families, with ARM Cortex A9 Dual COre Hard Macro embedded. This is a seminar document, attended in May 2013
SOFTWARE
- Streaming data over Ethernet.Using for interface with Ethernet MAC on Stratix IV Board
i2cBUS
- Altera的I2C总线FPGA程序，内有详细使用说明- The I2C Controller is available in VHDL and is optimized for the Altera® APEX™ , Stratix® , and Cyclone™ device families. All of the register addresses are defined as constants in the VHDL source
hip_s4gx530_gen2_x8_128
- 声明：这段程序来自别人，知识产权他人。 对于学习Stratix IV GX530这套开发板有一定帮助。(This a test program from other people. It is helpful for others to learn the Stratix IV GX FPGA Development Kit Board.)
ACCx42_AvalonST_Input
- This module does pipelined accumulate operation with 42 bit int value, usually used in dsp, Proved in Altera Stratix FPGA devices
Quadrature_MACx42_AvalonSt_Input v1.0
- This module does Complex MAC based on Altera Stratix 2 DSP Blocks.
rtl
- 基于S10新品的2x2矩阵乘模块，附带双精度的乘法，除法ip核(2x2 matrix multiplication module based on S10 new product, with double precision multiplication, division IP kernel)