搜索资源列表
RS(204_188)decoder
- <Verilog HDL 语言编程》 RS(204,188)译码器的设计
RSdecoder.rar
- cpld/fpga RS(204,188)译码器的verilog程序,cpld/fpga RS (204,188) decoder of the Verilog program
viterbi_for_bch.rar
- Viterbi based trellis decoder for (7,4) - binary BCH code,Viterbi based trellis decoder for (7,4)- binary BCH code
mp3decoder.rar
- mp3 解码的verilog代码，通过仿真综合及验证，能够播放所有的.mp3文件。压缩包包括所有的verilog源码以及详细的文档。,mp3 decoding Verilog code, the adoption of an integrated simulation and verification, can all play. mp3 file. Compressed packet including all the Verilog source code and detailed docu
decoder
- 用verilog编写的bch译码器，包括测试文件，随机加载了比特流，进行了测试。-Prepared using Verilog BCH decoder, including test papers, random load the bit stream to carry out the test.
H.264
- 关于h.264视频解码器完全源码（verilog）-With regard to h.264 video decoder full source code (verilog)
mp3decoder
- verilog实现mp3解码程序，包括testbench-mp3 decoder verilog implementation procedures, including the testbench
viterbi
- verilog程序，实现了（2，1，4）卷积码编码，和基于回溯算法的维特比译码器-verilog program to achieve the (2,1,4) convolutional code encoding, and algorithm based on the back of the Viterbi decoder
decoder
- 指令译码器的设计vhdl语言或者verilog HDL语言对单片机程序的处理-Instruction decoder design vhdl language or verilog HDL language processing microcomputer programs
H264
- h.264(verilog HDL) 这是基于流水线结构的H.264解码器源码-h.264 (verilog HDL) which is based on the pipeline structure of the H.264 decoder source code
decoder
- 一个verilog源代码，用于译码器的编程。-A verilog source code, for programming decoder.
MQdecoder
- Verilog HDL 实现的JPEG200的MQ解码-JPEG2000 MQ DECODER BASED ON FPGA， Verilog HDL
BKMP3_verilog
- The mp3 decoder write by using Verilog
decoder35
- decoder verilog. it is a 3 t0 5 decoder that compile with modelsim.
Viterbi_decoder
- Viterbi译码器的编解码器的设计 用Verilog实现-Viterbi decoder。Verilog
ldpc_decoder_802_3an_latest.tar
- ldpc decoder 802-3an,最新版本,verilog版本.完成基于LDPC解码 -ldpc decoder 802-3an, the latest version, verilog version. LDPC decoder based on the completion
hdlc_encode
- 基于Verilog的HDLC解码器。输出外接485进行差分输出。-HDLC-based Verilog decoder. Output of an external differential output 485.
Huffman-Decoder-master
- 用verilog编写的huffman解码程序(huffman decoder verilog)
Program of 2 to 4 Decoder
- Verilog code for decoder
Verilog源代码
- 多种基本功能的Verilog代码实现，包括多路选择器，二进制到BCD码转换，二进制到格雷码转换，7段译码器，8位数据锁存器，移位寄存器等等多种功能。(Verilog code implementation of a variety of basic functions, including multiplexer, binary to BCD code conversion, binary to Gray code conversion, 7-segment decoder, 8-bit dat