搜索资源列表
dds
- dds算法的fpga实现 altera 根据不同设置，输出不同频率的信号源-dds algorithm to achieve fpga set according to different altera, the output of the signal source at different frequencies
tut_embedded_programming_verilog_C_DE2
- This tutorial explains how to communicate with IO devices on the DE2 Board and how to deal with interrupts using C and the Altera Monitor Program. Two example programs are given that diplay the state of the toggle switches on the red LEDs. The ᤙ
pwm_source
- Altera官网上关于SOPC中自定义组件（PWM）的实例，官网上现在没了。。可很多书上都在用-Altera in the official line on the SOPC custom component (PWM) of the examples are not the official line. . Can be a lot of books are in use. . .
niossram
- altera fpga ep3c25器件微处理器开发，niosii+sram, 已编译通过，可直接下载到开发板-altera fpga ep3c25 the development of microprocessor devices, niosii+ sram, compiled through, can be directly downloaded to the development board
MTDB_SYSTEM_CD_V1.0
- ALTERA Nios II Embedded Evaluation Kit开发板制造商(terasic)提供的多媒体显示板（Terasic Multimedia Touch Panel Daughter Board (MTDB)）扩展开发包。 里为有两个开源的例子 1.MTDB_SD_Card_Audio,从SD卡中读取WAV文件然后通过DA播放，这个对不SD Card的初学者非常的有用，可以知道使用FPGA SPI来读写SD CARD。 2.MTDB_Systhesiz
A01
- 利用XC9572-TQFP100(Xilinx CPLD)制作的多功能CPLD/FPGA的ISP下载线源代码及线路图。可用来烧录Xilinx,Lattice,Altera等厂家的CPLD/FPGA.-Using XC9572-TQFP100 (Xilinx CPLD) produced by multi-CPLD/FPGA download cable ISP in the source code and circuit diagram. Burning can be used to Xilin
a3951ddd-b7c8-4598-b873-4cefbaf1d211
- Altera公司的FPGA器件内带PLL的详细中文使用手册-Altera' s FPGA device PLL with a detailed user manual in Chinese
DE2_NIOS_DEVICE_LED
- Altera FPGA 上利用nios嵌入式处理器实现USB的通信控制-Altera FPGA embedded processor nios use USB communication to achieve control
CPU-Altera-FPGA
- 用CPU配置Altera公司的FPGA，简单明了，通俗易懂。-EASY TO USE
SPI_IIC_design_example
- ALTERA原厂提供的例程，网上很难找到的，在MAX2系列芯片上实现过，VHDL和VERILOG两种语言编写 IIC读写程序-ALTERA provided the original routine, it is difficult to find online and in the MAX2 series chip-off, VHDL and VERILOG two languages
GPS
- 基于ALTERA公司的NIOSII的GPS信息接收系统的设计-ALTERA company NIOSII based on the GPS receiver system design information
IIC_bus
- 基于ALTERA公司的NIOSII的I2C总线传输应用设计-NIOSII based on ALTERA s application of the I2C bus transmission design
UART_DMA
- 基于ALTERA公司的NIOSII的串口通信DMA传输设计-NIOSII based on ALTERA s DMA transfer of the serial communication design
src
- i2c module. i test it on Altera FPGA.
FPGADSPBuilder
- DE2平台应用及DSPBUILDER技术，是altera杯上海交大电子设计竞赛内部材料，内含详细设计原理及源代码-DE2 platform and DSP BUILDER technology, Shanghai Jiaotong University altera Cup Electronic Design Contest of internal materials, including the principle of the detailed design and source code
nios
- altera ep2c8V2 开发实例 timer uart I2C key interrupt 等-altera ep2c8V2 examples timer uart I2C key interrupt etc.
StratixII_NiosII_2S60_DB_Rev01_SCH
- ALTERA官方StratixII EP2S60ROHS开发板原理图-ALTERA official StratixII EP2S60ROHS development board schematics
AlteraCycloneIIFPGAStarterBoard
- Altera Cyclone II FPGA Starter Board原理图-Altera Cyclone II FPGA Starter Board Schematic
altera_reed_solomon_design
- altera 的reed solomn 设计-reed solomn design from altera
ddr2_hamenc64
- VHDL实现的64bit海明码编码模块。 可适用于 Xilinx FPGA, Altera FPGA。-VHDL Implement 64 bit Hamming Code (encode)