搜索资源列表
ddr2_sodimm_x64_333MHz_hp2
- DDR2内存条（sodimm封装）的控制器设计-DDR2 controller for sodimm
k4t51xx3qj_rev11
- 64M 三星samsung公司的ddr2芯片的数据手册，在网上难找，直接问芯片供应商要的-64M DDR2 datasheets, online hard to find, to ask directly to the chip suppliers
Verilog_module
- micron 1G内存条verilog模型，对应具体信号为MT8HTF12864HZ-800，内存颗粒为MT47H128M8CF-25-micron 1G DDR2 SDRAM verilog module
MT47H128M4_MT47H64M8_MT47H32M16
- micron公司DDR2 SDRAM资料：MT47H128M4_MT47H64M8_MT47H32M16.pdf-micron DDR2 SDRAM：MT47H128M4_MT47H64M8_MT47H32M16.pdf
ddr2_demo
- lattice 操作DDR2控制器verilog源代码-the verilog source code of ddr2 control of lattice
2048Mb_ddr2_verilog_model
- ddr2 verilog model,用于验证DDR2 Controller。-DDR2 Verilog model, and used to verify the DDR2 Controller.
VmodCAM-0.0
- 从VMOD设想头中读入视频流数据，将其存在ddr2中，并且通过Hdmi线显示出来-Read into the video stream data from the VMOD envisaged head, exist ddr2, and the the Hdmi line displayed
FSM
- FPGA学习资料，新手入门资料,VERILOG- Micron SDRAM DDR2 Simulation model Verilog
ddr
- DDR2内存条在FPGA中的应用,包括内部结构，时序操作和注意事项。-about DDR2 APLLICATION IN FPGA，includ inner instraction timequist and attend.
ddr2_sdram_latest[1].tar
- ddr2 sdram 控制器的vhdl源码,并包括了ddr2 sdram芯片的仿真模型-DDR2 sdram controller VHDL source code and ddr2 sdram simulation module
ug_ddr_sdram
- DDR and DDR2 SDRAM Controller Compiler 的用户向导-DDR and DDR2 SDRAM Controller Compiler User Guide
emi(1)
- the external memory interface for the ddr ddr2 ddr3 sdram device
DDDRR2_sdrramD
- DDR2 的控制器，它是由由LATTICE的编译器生成。 -DDR2 controller, which is generated by by LATTICE the compiler.
test_ddr2_mem_model
- ddr2 test bench top for altera fpga.-ddr2 test bench top for fpga.
npi_write
- 从FPGA向DDR2写入数据。采用NPI接口。单字写入。是用Verilog HDL 写的-Write data from the FPGA to DDR2. Using NPI Interface. The word is written. Is written using Verilog HDL
ddr2
- dsp tmsc6455 ddr配置例程-dsp tmsc6455 ddr configuration routines
DDR2_40
- 红色飓风四代开发版读取内存DDR2的开发例程，对于fpga开发者应该会有一定帮助的，我分享上来 -The red hurricane development version of four generations read the development of memory DDR2 routine fpga developers should have some help, I share up
DDR2standardize-Chinese-version
- DDR2规范中文版，对ddr2控制器编写十分有用-DDR2 specification Chinese version prepared ddr2 controller is very useful
atlys
- atlys ddr2 test ucf file generated
DDR2_timing_spec(Samsung)
- 三星的DDR2操作时序规范，很详细-DDR2 Operation timing specifications (Samsung)