搜索资源列表
DDR3-SDRAM-Standard.pdf
- DDR3 Standard document,内存规格书，参考，详细-DDR3 STANDARD DOCUMENT
DDR3-SDRAM-Controller
- DDR3的控制器（并带有Testbench），可烧录到FPGA中对内存进行读写，相关技术人员可在该代码上修改用于其他场合-DDR3 controller (with an Testbench), the FPGA can be burned to the memory read and write, the relevant technical staff can modify the code to be used on other occasions
ddr3
- VHDL code sample.this files is the VHDL code for using of DDR3 and DDR2 SDRAM.
The-difference-between-DDR3-andDDR2
- 这个文档详细描述了DDR3与DDR2之间的区别所在-this doc tells details the differences between DDR3 and DDR2
DDR3
- 。针对高速实 时数字信号处理中大容量采样数据 通过DDR3 存储和读取的应用背景，-DDR3 FPGA
DDR3
- 。针对高速实 时数字信号处理中大容量采样数据 通过DDR3 存储和读取的应用背景， 设计和实现了适用于该背景的控制 状态机，并对控制时序作了详尽的 分析。系-DSP FPGA
DDR3-SDRAM-controller
- My package named design DDR3 Synchronous Data Random Access Memory by verilog.The memory controller is a digital circuit which manages the flow of data going to and from the computer s main memory.
DDR3-SDRAM-Verilog-Model
- ddr3模型以及代码和测试程序，不过带有小瑕疵-ddr3 model and code and test procedures, but with small flaws
DDR3
- this about ddr3 document and a good file to be refered -this is about ddr3 document and a good file to be refered
xilinx-DDR3-sdram-design
- xilinx平台DDR3设计教程之设计篇 -XILINX DDR3 SDRAM DESIGN
application-of-xilinx-DDR3-design-
- xilinx平台DDR3设计教程之应用 -application of xilinx DDR3 design
Lattice-DDR3
- littice ddr3的仿真教程，主要讲解怎么仿真littce 的ddr3，和littice ddr3的基本知识的讲解-explain the basics of lattice ddr3 simulation tutorial, mainly on how simulation little of ddr3, and littice ddr3 of
DDR3-SDRAM-Verilog-Model
- 官方网站的verilog语言描写的ddr3 sdram仿真模型。各种型号可选。
DDR3-User-Guide
- 在DDR3内存控制器一起使用JESD79-3C符合标准SDRAM器件接口。内存类型，如DDR1 SDRAM，DDR2 SDRAM，SDR SDRAM，SBSRAM和异步不支持的回忆。在DDR3内存控制器，SDRAM，可用于程序和数据存储。梯形失真校正设备有一个实例。-Use JESD79-3C standard SDRAM DDR3 memory controller interface devices together. Memory types, such as DDR1 SDRAM, DD
intr_priority_control
- 多种数据缓存ddr3，乒乓缓存优先级判断，优先将缓存紧急的数据类型读出ddr3.(A variety of data cache DDR3, table tennis cache priority judgment, priority will cache urgent data type read ddr3.)
11_ddr3_test
- fpga ddr3 sdram verilog 黑金的板子(fpga ddr3 sdram verilog)
ddr3_rw_ctrl
- verilog基于DDR3 xilinx IP核 的DDR3的读写控制，方便学习(it is based on DDR3 IP core of xilinx)
Micron_Memory_DDR_SDRAM
- ddr3 封装库 采用粉末冶金法制备了微米尺寸和准纳米尺寸的氧化镧粒子增强钼合金。(ddr3 package The molybdenum alloy reinforced by lanthana particles with the sizes of nanometer and micron was prepared by powder metallurgy)
ddr3control
- 8位突发长度，一次64bit数据读写，MIG核(DDR3 controll implimention)
11_ddr3_test
- Xilinx Spartan-6 DDR3 test code