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uart8.zip
- 使用Libero提供的异步通信IP核实现UART通信，并附带仿真程序。UART设置为1位开始位，8位数据位，1位停止位，无校验。且UART发送自带2级FIFO缓冲，占用FPGA面积很小。,Libero provided the use of asynchronous communication IP core implementation UART communications, and incidental simulation program. UART is set to 1 to sta
Fusion_ABC_UART_2009_03_17
- Actel Fusion System Management Development Kit UART Example. Contains Libero design using CoreABC. Program prints text to UART.
ACTEL_FUSION_ESIMERKKISOVELLUS_V4_FINAL_11_06_200
- Actel Fusion System Management Kit Example. Libero design for printing text to LCD.
Libero8.5_UG
- Libero集成设计环境(IDE)8.5版本，这套完整的软件设计工具系列已进一步扩展，支持新近推出的nano版本IGLOO和ProASIC3现场可编程门阵列(FPGA)。-Libero Integrated Design Environment (IDE) 8.5 version, this complete series of software design tools have been further expanded to support the recently introduced
ESIMERKKISOVELLUS_V13
- Actel Fusion System Management Kit Libero Design for using I2C
pa3_libguide_ug
- actel开发环境libero中应用到是一些基础宏的说明文档，很难得的资料-libero in actel application development environment are the basis of the documentation of the macro, it is difficult to get information
halfadder
- vhdl code for half adder using libero software
fulladder
- vhdl code for full adder program using libero software.
FIFO
- 用VHDL语言编程实现的FIFO的设计，可用于数据的寄存和缓冲，libero仿真通过-Programming language using the FIFO VHDL design can be used for data storage and buffering, libero simulation by
Libero_UG
- libero的使用详细教程，比较详细，比官网上给的教程详细的多-libero use of detailed tutorials, a more detailed tutorial than the official website for more details
UART
- 用VHDL语言编程实现UART，8位数据位，校验位自己可以加！LIBERO仿真正确！-VHDL language programming with UART, 8 data bits, parity bit that they can add! LIBERO simulation correctly!
CoreI2C
- 基于ACTEL公司Fusion系列芯片开发的嵌入式工程。实现了I2C功能，包括编写的Core。文件包括Libero开发的工程及Keil开发的工程。-Fusion Series ACTEL chip company based development of embedded projects. I2C capabilities realized, including the preparation of the Core. Documents include the development of
SD
- 基于ACTEL公司Fusion系列芯片开发的嵌入式工程。实现了SD卡读取功能，文件包括Libero开发的工程及Keil开发的工程。-Fusion Series ACTEL chip company based development of embedded projects. Achieved SD card reader function, the file including the Libero Keil development projects and the development o
LED
- FPGA程序 libero环境下运行 实验例程开发板LED灯轮流点亮，内附说明文档-FPGA programming environment to run experiments libero routine development board LED light is lit in turn, included documentation
FlashROM
- libero环境下FPGA中介绍ProASIC3/EFlash_ROM的仿真例程，-libero FPGA environment described ProASIC3/EFlash_ROM simulation routines,
Syn_FIFO
- 在libero环境下，FPGA如何使用ProASIC3/E的同步FIFO-In libero environment, FPGA using ProASIC3/E of the synchronous FIFO
Two_Port_RAM
- FPGA libero环境下 介绍ProASIC3/E的TWO Port RAM的使用-FPGA libero circumstances described ProASIC3/E use of TWO Port RAM
adder
- actel fpga加法器的verilog源码，在libero环境开发的-actel fpga adder verilog source code, development environment in the libero
how_to_use_Libero8
- 是libero的使用说明，如果想使用actelfpga的libero软件可以试试它。-the reference of actel fpga soft Libero8.5, and it s good tool for new learner.
Libero-SoC集成开发环境使用教程
- Libero-SoC集成开发环境使用教程(Libero-SoC integrated development environment use tutorial)