搜索资源列表
SinglecycleCPU
- 用Verilog实现一个简单的单周期CPU，并运行Quicksort程序以验证正确性。-This file is written in Verilog to achieve a single cycle processor. It can run in Quartus2.
DP
- TIC6000系列 C67浮点DSP处理器 派发站源代码-TIC6000 floating-point DSP processor series C67 station source code distributed
23825786CodewarriorProcExpert
- CodeWarrior Processor Expert In-depth Experience
Superscalar_processor_verilog
- super scalar Processor implemented in Verilog. Details about project included.-super scalar Processor implemented in Verilog. Details about project included.
20091219073124_CodeWarrior
- CodeWarrior中文说明 • 利用向导创建一个新工程项目 • 在新项目中加入或删除文件 • 编译 • 调试 • 启动程序 • PRM文件设置 • 如何对IO及寄存器进行操作 • 如何写中断程序 • 如何使用汇编和C语言混合编程 • 嵌入式编程注意事项 • 如何使用Processor Expert-Chinese descr iption
Getprocessorfeatures
- 获取处理器功能，获取分页尺寸、程序最大寻址空间、程序最小寻址空间等-Get processor features for page size, the maximum addressable space program, the program address space, the smallest
graduated_paper
- 基于FPGA的可变点FFT处理器的设计与实现-FPGA-based variable point FFT Processor Design and Implementation
GUISim1011
- STMicroelectronics STM32 Processor GPS
Voice-Codec-for-Floating-Point-Processor
- Voice Codec for Floating Point Processor--Hans Engströ m & Johan Ross Master Thesis，In Electronics Design, Dept. Of Electrical Engineering At Linkö ping University Supervisor: Johan Eilert Examiner: Dake Liu Linkö ping, 2008-Vo
ADSP-BF533
- blackfin adsp-bf 533 processor hardware reference
slice
- A technique for constructing a processor from modules,each of which processes one bit-field or “slice” of an operand.Bit slice processors usually consist of an ALU of 1,2,4 or 8-bits and control lines including carry or overflow signals usually inter
butterfly1
- FFT蝶形运算单元程序，可用于OFDM,以及任何相关数字信号处理的设计中-FFT butterfly processor program can be used in OFDM, as well as any relevant design of digital signal processing
xsoc-beta-093
- a processor source code and simple system-on-a-chip !
mips
- in verilog 8bit mips processor
grlib-tmtc-1.0.18.tar
- Zipped LEON3 processor VHDL core.
t65
- Full VHDL code for T60 processor-Full VHDL code for T60 processor....
processor
- processor design in vhdl
fft
- vhdl code and verilog code for an 128 point fft processor which has to be executed in xlinx software as needed for course project
data-flow-driven-stream-processor-chip-architectur
- A sub-class of data flow driven stream processor chip architecture and programming model
FFT_report
- 印度一所大学的硕士研究生毕业设计：FFT处理器的的fpga实现-India, a masters graduate of the University of Design: FFT processor for fpga implementation