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mp3 解码的verilog代码，通过仿真综合及验证，能够播放所有的.mp3文件。压缩包包括所有的verilog源码以及详细的文档。,mp3 decoding Verilog code, the adoption of an integrated simulation and verification, can all play. mp3 file. Compressed packet including all the Verilog source code and detailed docu
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verilog实现的AES-128加解密程序，FPGA验证通过-verilog implementation of AES-128 encryption and decryption process, FPGA verification through
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CRC计算模块，7位CRC计算。经过FPGA及IC平台验证。-CRC calculation module, 7 CRC calculation. Through the FPGA and IC platform for verification.
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用Verilog语言编写的FPGA控制PWM的程序.利用码盘脉冲进行调速,进行过简单试验,可用.没有经过长期验证.做简单修改即可应用!-Using Verilog languages FPGA control PWM procedures. Using pulse code disk for governor, conducted a simple test that can be used. Not after a long-term verification. To do a simple
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The use of hardware descr iption languages (HDLs) is becoming
increasingly common for designing and verifying FPGA designs.
Behavior level descr iption not only increases design productivity, but also
provides unique advantages for design verif
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51单片机IP核源码，可以在fpga实现，并进行仿真与验证-51 single-chip IP nuclear source, you can achieve the fpga, and simulation and verification
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设计与验证verilog hdl配套光盘-Design and verification verilog hdl" supporting CD-ROM
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OVM(Open Verification Methdology) for system verilog or systemC
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该代码是Veriloghdl语言实现的串口通信，经过FPGA板子下载验证通过，读者可以使用-The code is Veriloghdl language of the serial communications, after verification by FPGA board download, readers can use
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一个很好的关于verilog的PPT
第1章 EDA设计与Verilog HDL语言概述
第2章 Verilog HDL基础与开发平台操作指南
第3章 Verilog HDL程序结构
第4章 VERILOG HDL语言基本要素
第5章 面向综合的行为描述语句
第6章 面向验证和仿真的行为描述语句
第7章 系统任务和编译预处理语句
第8章 VERILOG HDL可综合设计的难点解析
第9章 高级逻辑设计思想与代码风格
第10章 可综合状态机开发实例
第1
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verilog验证平台的使用
很不错 很详细 想具体-verilog verification platform is more like using a very good specific
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This a system verilog book.-This is a system verilog book.
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System Verilog for Verification, 2nd Edition.非常经典的资料，供IC开发的人员作自测平台或者验证的人员使用-System Verilog for Verification, 2nd Edition. Very classic information for IC self-test platform for the development of personnel for use by or verification
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Verilog数字系统设计——RTL综合.测试平台与验证 书中的所有源代码-Verilog Digital System Design- RTL synthesis. Test and verification platform for all the source code for the book
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IEEE 2001 verilog 标准 ,详细讲述了 业内 公认的 VERILOG 标准 ,-The Verilog¤ Hardware Descr iption Language (Verilog HDL) became an IEEE standard in 1995 as IEEE
Std 1364-1995. It was designed to be simple, intuitive, and effective at multiple levels of abstractio
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SYSTEM VERILOG FOR VERIFICATION BOOK
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verilog任意分频程序，包括奇数倍分频和偶数倍分频，占空比为50 ，QuartusII上验证程序有效-verilog every divide programs, including an odd multiple divider and even multiple frequency, duty cycle 50 , the QuartusII on the verification process
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其主要使用verilog编写fft程序主体，之后通过quartus和matlab实现对fft程序的测试，可以很好做到自动化验证(The main use of verilog prepared fft main program, and then achieved by quartus and matlab fft program testing, you can do a good job of automated verification)
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Material to learn how to use system verilog and how to write testbenches for verification.
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Verilog HDL的13个经典实例。经过验证，值得学习(The 13 Verilog HDL classic examples. After verification, worth learning)
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