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test
- wARM体系结构的VHDL设计，研究ARM体系设计很有用-WARM VHDL architecture design, research useful ARM System Design
VHDL
- 一些VHDL的小程序，适合初学者学习VHDL语言的基本语法和编写。-Some small VHDL program, suitable for beginners to learn VHDL language and the preparation of the basic grammar.
EDA++VHDL
- Vhdl和EDA实用手册，供初学者学习和研究，中文版的-VHDL and EDA practical manual for beginners to learn and study Chinese language version of
1553_enc_dec
- 1553b的编解码源程序 和仿真程序，fpga来实现的 vhdl语言 -1553B codec source code and simulation procedures, fpga to achieve the VHDL language
bujindianji
- vhdl代码！步进电机定位控制系统VHDL程序与仿真！初学者可以参考参考-VHDL code! Stepper motor positioning control system and simulation of VHDL procedures! Beginners can refer to reference
fanzhen
- vhdl代码： 出租车计价器VHDL程序与仿真！初学fpga者可以参考参考！！比较简单-VHDL code: Taximeter VHDL procedures and simulation! FPGA beginner can reference a reference! ! Relatively simple
timer
- vhdl代码：电子时钟VHDL程序与仿真！初学fpga者可以参考参考！！比较简单-VHDL code: electronic clock and simulation of VHDL procedures! FPGA beginner who can refer to reference! ! Relatively simple
fangzhen
- vhdl代码： 采用等精度测频原理的频率计程序与仿真！初学fpga者可以参考参考！！比较简单-VHDL code: Using the principle of frequency measurement accuracy, such as the frequency of procedures and simulation! FPGA beginner who can refer to reference! ! Relatively simple
i2c
- 一个用状态机VHDL语言编写的I2C源代码-A state machine by VHDL language I2C source code
Pentium
- 这两个分别是8位乘法器的VHDL语言的实现，并经过个人用QUARTUS的验证，另外一个是奔腾处理器的设计思想-The two were 8 multiplier realization of VHDL language and personal use Quartus After verification, another is a Pentium processor design idea
clock
- 用高速硬件语言VHDL设计的全功能数字钟，经测试运行稳定-VHDL language used high-speed hardware design full-function digital clock, tested and stable operation
pre_norm_sqrt
- 一种用VHDL语言描述的浮点平方根前规格化的源代码编程-VHDL language used to describe a floating-point square root of the source code before the standardized programming
5956446verilog_ppt
- 具体介绍VHDL的原理，附带相关的例程。欢迎大家收藏下载-Introduced the principle of specific VHDL, incidental related routines. Welcome to the collection download
ssz
- 数字钟，用VHDL写的各个模块，顶层用图形编辑，在实验箱上完全通过-Digital clock, using VHDL written by various modules, top-level graphics editing, in the experimental box completely through
post_norm_addsub
- 浮点加减运算的后规格化VHDL程序源代码，很不错，希望对大家有用-Floating-point addition and subtraction operations after the standardized VHDL source code, it is good, I hope all of you a useful
clock
- 时钟的vhdl实现，具有打铃等功能，是一个很好的实现，我们做电子竞赛的源代码-VHDL clock to achieve a play-ling and other functions, is a good realization, we have the source code of the electronic competition
mp3_decoder
- MP3解码的VHDL实现，包括霍夫曼解码等-VHDL realization of MP3 decoding, including Huffman decoding
vhdl
- 要求用VHDL语言设计7人表决器和系列检测器，检测“1111111101111110”-VHDL language design requires a vote 7 and Series detector 1111111101111110
vhdl
- 包含VHDL语言设计7人表决器电路和系检测器列-VHDL language contains 7 to vote on the design of circuit and the Department of detector out
VHDL
- VHDL（Very High Speed Integrated Circuit）教程!供VHDL初学者使用！-VHDL (Very High Speed Integrated Circuit) Tutorial! VHDL for beginners to use!