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100exampleofvhdl
- 100个VHDL例子，包括各种逻辑门、组合逻辑电路及时序电路-100 VHDL examples, including a variety of logic gates, combinational logic circuit and timing circuit
vhdl
- 学习VHDL可以用得上，有很多实例，可以对照着自己写一些东西-VHDL can be useful to learn, there are many examples, can be done to write something
200741691252
- dds源代码，vhdl程序，函数信号发生器。-dds source code, vhdl procedure, function signal generator.
HW_songer_tiexuedanxin
- 用VHDL编写的播放器，播放射雕英雄传主题曲之《铁血丹心》，另附编码表WORD档-Using VHDL prepared player, the player shooting Heroes theme song of
uart
- 用VHDL实现的一个uart控制器，输入时钟为33M-Use VHDL to achieve a UART controller, input clock for the 33M
pwm-c
- 用VHDL编写的PWM控制程序，通过寄存器控制20余路PWM输出；qar是quartus的压缩包格式-VHDL prepared using PWM control procedures, through the registers to control more than 20 road PWM output qar is Quartus compressed packet format
davincihd_revf_ver6
- DaVinci HD CPLD Firmware Resources 这是TI原装开发板DM6467原理图的 CPLD的VHDL代码，是Spectrum Digital, Inc刚开发出来的！ CPLD Firmware Project CPLD Firmware Project (Version 6).-DaVinci HD CPLD Firmware Resources This is the original TI development board DM6467 Schema
VHDL
- 适合VHDL开发的中级教程,是比较经典的书籍-Intermediate VHDL for the development of curriculum, which is a more classic books
miniUART
- 自适应波特率的通用异步串行接口电路（ＵＡＲＴ）的ＶＨＤＬ源码，在ＡＬＴＥＲＡ上运行成功-Adaptive baud rate of the universal asynchronous serial interface circuit (UART) the VHDL source code, to run successfully in ALTERA
Triangle_Wave_generater
- 采用vhdl语言编程，基于quartus平台的三角波仿真。-Using VHDL language programming, based on the Quartus triangular wave simulation platform.
SIN
- 使用VHDL语言和CPLD芯片生成39KHz的信号-The use of VHDL language and CPLD chip 39KHz signal generated
crcm
- crc 校验，vhdl源码，经仿真能正常运行，供大家参考-CRC checksum, vhdl source, the simulation can be normal operation, for your reference
dff
- 用vhdl编写的D触发器，锁存器等，不需帐号就可自由下载此源码-VHDL prepared using D flip-flops, latches and so on, no account can be a free download this source
ARM_and_Verilog
- arm处理器的vhdl源代码编写，可以参考-arm processor VHDL source code to prepare, can refer to
digitalclock.vhd
- 实现电子钟的功能，使用VHDL编程语言，调试已经通过-Electronic clock function, the use of VHDL programming language, debugging has been passed
vhdl
- 学习vhdl硬件描述语言的一些例子的原代码-VHDL hardware descr iption language to learn some examples of the original code
zhiliu_dianji
- 直流电机的VHDL源程序,经过编译和仿真.-DC motor VHDL source code, after compilation and simulation.
cd
- 一个彩灯循环控制的VHDL程序,功能还可添加.-Cycle control of a lantern VHDL procedures, functions can also be added.
adder1
- 一个全加器的VHDL程序,经过编译和仿真.-A full adder of the VHDL program, after compiling and simulation.
FFT_VHDL
- fft是基本的信号处理算法，本程序为fft算法的VHDL语言-fft is a fundamental signal processing algorithms, the procedures for the fft algorithm VHDL language